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Difference between revisions of "vti/vl86cx/vy86c610c"
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{{vti title|VY86C610C}} | {{vti title|VY86C610C}} | ||
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|name=VY86C610C | |name=VY86C610C | ||
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|market 2=Desktop | |market 2=Desktop | ||
|first launched=July 23, 1994 | |first launched=July 23, 1994 | ||
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|family=VL86Cx | |family=VL86Cx | ||
|frequency=33 MHz | |frequency=33 MHz | ||
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'''VY86C610C''' is a {{arch|32}} [[ARM]] microprocessor designed by [[arm holdings|ARM]] and introduce by [[vti|VTI]] in [[1994]]. This processor is based on the {{armh|ARM6|l=arch}} microarchitecture ({{armh|ARM610|l=core}} core). This chip is an enhanced version of the original {{\\|VY86C610}}, manufactured on [[VLSI Technology|VLSI]]'s [[0.6 µm process]] and operating at 33 MHz. | '''VY86C610C''' is a {{arch|32}} [[ARM]] microprocessor designed by [[arm holdings|ARM]] and introduce by [[vti|VTI]] in [[1994]]. This processor is based on the {{armh|ARM6|l=arch}} microarchitecture ({{armh|ARM610|l=core}} core). This chip is an enhanced version of the original {{\\|VY86C610}}, manufactured on [[VLSI Technology|VLSI]]'s [[0.6 µm process]] and operating at 33 MHz. | ||
| + | According to ARM, this processor had the performance of 30 Dhrystone (2.2) MIPS for a 60 DMIPS/Watt. | ||
== Cache == | == Cache == | ||
{{main|arm_holdings/microarchitectures/arm6#Memory_Hierarchy|l1=ARM6 § Cache}} | {{main|arm_holdings/microarchitectures/arm6#Memory_Hierarchy|l1=ARM6 § Cache}} | ||
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}} | }} | ||
| − | == | + | == Documents == |
| − | * [[:File: | + | * [[:File:vlsi arm710-610.pdf|VY86C710/VY86C610 Product Brief]] |
Latest revision as of 15:32, 13 December 2017
| Edit Values | |||||||||
| VY86C610C | |||||||||
| General Info | |||||||||
| Designer | ARM Holdings | ||||||||
| Manufacturer | VLSI Technology | ||||||||
| Model Number | VY86C610C | ||||||||
| Part Number | VY86C610C, VY86C610C-5 | ||||||||
| Market | Embedded, Desktop | ||||||||
| Introduction | July 23, 1994 (launched) | ||||||||
| General Specs | |||||||||
| Family | VL86Cx | ||||||||
| Frequency | 33 MHz | ||||||||
| Microarchitecture | |||||||||
| ISA | ARMv3 (ARM) | ||||||||
| Microarchitecture | ARM6 | ||||||||
| Chipset | MEMC, VIDC, IOC | ||||||||
| Core Name | ARM610 | ||||||||
| Process | 0.6 µm | ||||||||
| Transistors | 358,931 | ||||||||
| Technology | CMOS | ||||||||
| Die | 26 mm² | ||||||||
| Word Size | 32 bit | ||||||||
| Cores | 1 | ||||||||
| Threads | 1 | ||||||||
| Max Memory | 4 GiB | ||||||||
| Max Address Mem | 0xFFFFFFFF | ||||||||
| Multiprocessing | |||||||||
| Max SMP | 1-Way (Uniprocessor) | ||||||||
| Electrical | |||||||||
| Power dissipation | 0.5 W | ||||||||
| Vcore | 5 V ± 5 % | ||||||||
| Tstorage | -65 °C – -150 °C | ||||||||
| Tambient | -10 °C – 70 °C | ||||||||
| Packaging | |||||||||
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VY86C610C is a 32-bit ARM microprocessor designed by ARM and introduce by VTI in 1994. This processor is based on the ARM6 microarchitecture (ARM610 core). This chip is an enhanced version of the original VY86C610, manufactured on VLSI's 0.6 µm process and operating at 33 MHz.
According to ARM, this processor had the performance of 30 Dhrystone (2.2) MIPS for a 60 DMIPS/Watt.
Cache[edit]
- Main article: ARM6 § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Documents[edit]
Facts about "VY86C610C - VTI"
| l1$ description | 64-way set associative + |
| l1$ size | 4 KiB (4,096 B, 0.00391 MiB) + |