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Difference between revisions of "intel/xeon e3/e3-1501m v6"
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{{intel title|Xeon E3-1501M v6}} | {{intel title|Xeon E3-1501M v6}} | ||
− | {{ | + | {{chip |
|name=Xeon E3-1501M v6 | |name=Xeon E3-1501M v6 | ||
− | | | + | |image=kaby lake h (front).png |
+ | |caption=package, front | ||
|designer=Intel | |designer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
|model number=E3-1501M v6 | |model number=E3-1501M v6 | ||
+ | |s-spec=SR3FO | ||
|market=Workstation | |market=Workstation | ||
|market 2=Mobile | |market 2=Mobile | ||
Line 15: | Line 17: | ||
|frequency=2,900 MHz | |frequency=2,900 MHz | ||
|turbo frequency1=3,600 MHz | |turbo frequency1=3,600 MHz | ||
+ | |turbo frequency2=3,500 MHz | ||
+ | |turbo frequency3=3,400 MHz | ||
+ | |turbo frequency4=3,300 MHz | ||
|bus type=DMI 3.0 | |bus type=DMI 3.0 | ||
|bus rate=8 GT/s | |bus rate=8 GT/s | ||
Line 25: | Line 30: | ||
|core name=Kaby Lake H | |core name=Kaby Lake H | ||
|core family=6 | |core family=6 | ||
+ | |core model=158 | ||
+ | |core stepping=B0 | ||
|process=14 nm | |process=14 nm | ||
|technology=CMOS | |technology=CMOS | ||
|word size=64 bit | |word size=64 bit | ||
|core count=4 | |core count=4 | ||
− | |thread count= | + | |thread count=4 |
|max cpus=1 | |max cpus=1 | ||
|max memory=64 GiB | |max memory=64 GiB | ||
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|tstorage max=125 °C | |tstorage max=125 °C | ||
|package module 1={{packages/intel/fcbga-1440}} | |package module 1={{packages/intel/fcbga-1440}} | ||
− | |||
}} | }} | ||
'''Xeon E3-1501M v6''' is a {{arch|64}} [[quad-core]] entry-level workstations and servers [[x86]] microprocessor introduced by [[Intel]] in mid-[[2017]]. This processor, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is manufactured on Intel's improved [[14 nm process|14nm+ process]]. The E3-1501M v6 operates at 2.9 GHz with a TDP of 45 W and with a {{intel|Turbo Boost}} frequency of 3.6 GHz for a single active core. This MPU supports up to 64 GiB of dual-channel ECC DDR4-2400 memory and incorporates Intel's {{intel|HD Graphics P630}} [[IGP]] operating at 350 MHz with a burst frequency of 1 GHz. | '''Xeon E3-1501M v6''' is a {{arch|64}} [[quad-core]] entry-level workstations and servers [[x86]] microprocessor introduced by [[Intel]] in mid-[[2017]]. This processor, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is manufactured on Intel's improved [[14 nm process|14nm+ process]]. The E3-1501M v6 operates at 2.9 GHz with a TDP of 45 W and with a {{intel|Turbo Boost}} frequency of 3.6 GHz for a single active core. This MPU supports up to 64 GiB of dual-channel ECC DDR4-2400 memory and incorporates Intel's {{intel|HD Graphics P630}} [[IGP]] operating at 350 MHz with a burst frequency of 1 GHz. | ||
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|l2 desc=4-way set associative | |l2 desc=4-way set associative | ||
|l2 policy=write-back | |l2 policy=write-back | ||
− | |l3 cache= | + | |l3 cache=6 MiB |
− | |l3 break= | + | |l3 break=4x1.5 MiB |
− | |l3 desc= | + | |l3 desc=12-way set associative |
|l3 policy=write-back | |l3 policy=write-back | ||
}} | }} | ||
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|x8664=Yes | |x8664=Yes | ||
|nx=Yes | |nx=Yes | ||
− | |||
− | |||
|mmx=Yes | |mmx=Yes | ||
|emmx=Yes | |emmx=Yes | ||
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|avx=Yes | |avx=Yes | ||
|avx2=Yes | |avx2=Yes | ||
− | | | + | |avx512f=No |
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
|abm=Yes | |abm=Yes | ||
|tbm=No | |tbm=No | ||
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|flex=Yes | |flex=Yes | ||
|fastmem=No | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
|isrt=Yes | |isrt=Yes | ||
|sba=No | |sba=No | ||
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|tsx=Yes | |tsx=Yes | ||
|txt=Yes | |txt=Yes | ||
− | |ht= | + | |ht=No |
|vpro=Yes | |vpro=Yes | ||
|vtx=Yes | |vtx=Yes | ||
Line 196: | Line 218: | ||
|securekey=Yes | |securekey=Yes | ||
|osguard=Yes | |osguard=Yes | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
|smartmp=No | |smartmp=No | ||
|powernow=No | |powernow=No | ||
+ | |amdvi=No | ||
|amdv=No | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
|rvi=No | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
}} | }} |
Latest revision as of 12:42, 8 April 2018
Edit Values | |||||||||||||
Xeon E3-1501M v6 | |||||||||||||
package, front | |||||||||||||
General Info | |||||||||||||
Designer | Intel | ||||||||||||
Manufacturer | Intel | ||||||||||||
Model Number | E3-1501M v6 | ||||||||||||
S-Spec | SR3FO | ||||||||||||
Market | Workstation, Mobile | ||||||||||||
Introduction | June 12, 2017 (announced) June 12, 2017 (launched) | ||||||||||||
Shop | Amazon | ||||||||||||
General Specs | |||||||||||||
Family | Xeon E3 | ||||||||||||
Series | E3-1500 | ||||||||||||
Locked | Yes | ||||||||||||
Frequency | 2,900 MHz | ||||||||||||
Turbo Frequency | 3,600 MHz (1 core), 3,500 MHz (2 cores), 3,400 MHz (3 cores), 3,300 MHz (4 cores) | ||||||||||||
Bus type | DMI 3.0 | ||||||||||||
Bus rate | 8 GT/s | ||||||||||||
Clock multiplier | 29 | ||||||||||||
Microarchitecture | |||||||||||||
ISA | x86-64 (x86) | ||||||||||||
Microarchitecture | Kaby Lake | ||||||||||||
Platform | Kaby Lake | ||||||||||||
Chipset | Sunrise Point | ||||||||||||
Core Name | Kaby Lake H | ||||||||||||
Core Family | 6 | ||||||||||||
Core Model | 158 | ||||||||||||
Core Stepping | B0 | ||||||||||||
Process | 14 nm | ||||||||||||
Technology | CMOS | ||||||||||||
Word Size | 64 bit | ||||||||||||
Cores | 4 | ||||||||||||
Threads | 4 | ||||||||||||
Max Memory | 64 GiB | ||||||||||||
Multiprocessing | |||||||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||||||
Electrical | |||||||||||||
Vcore | 0.55 V-1.52 V | ||||||||||||
TDP | 45 W | ||||||||||||
cTDP down | 35 W | ||||||||||||
Tjunction | 0 °C – 100 °C | ||||||||||||
Tstorage | -25 °C – 125 °C | ||||||||||||
Packaging | |||||||||||||
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Xeon E3-1501M v6 is a 64-bit quad-core entry-level workstations and servers x86 microprocessor introduced by Intel in mid-2017. This processor, which is based on the Kaby Lake microarchitecture, is manufactured on Intel's improved 14nm+ process. The E3-1501M v6 operates at 2.9 GHz with a TDP of 45 W and with a Turbo Boost frequency of 3.6 GHz for a single active core. This MPU supports up to 64 GiB of dual-channel ECC DDR4-2400 memory and incorporates Intel's HD Graphics P630 IGP operating at 350 MHz with a burst frequency of 1 GHz.
This model supports a configurable TDP-down of 35 watts.
Cache[edit]
- Main article: Kaby Lake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options
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Graphics[edit]
Integrated Graphics Information
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[Edit] Kaby Lake (Gen9.5) Hardware Accelerated Video Capabilities | |||||||
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Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, MVC, Stereo | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main, Main 10 | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | 3840x3840 | |||
VP8 | Unified | Unified | N/A | 0 | Unified | 1080p | |
VP9 | 0 | 2160p (4K) | 0, 2 | Unified | 2160p (4K) |
Features[edit]
[Edit/Modify Supported Features]
Facts about "Xeon E3-1501M v6 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E3-1501M v6 - Intel#io + |
device id | 0x591D + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology + and Identity Protection Technology + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel identity protection technology support | true + |
has intel my wifi technology support | true + |
has intel secure key technology | true + |
has intel smart response technology support | true + |
has intel speed shift technology | true + |
has intel supervisor mode execution protection | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
integrated gpu | HD Graphics P630 + |
integrated gpu base frequency | 350 MHz (0.35 GHz, 350,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 24 + |
integrated gpu max frequency | 1,000 MHz (1 GHz, 1,000,000 KHz) + |
integrated gpu max memory | 1,740.8 MiB (1,782,579.2 KiB, 1,825,361,100.8 B, 1.7 GiB) + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
max memory bandwidth | 35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 16 + |
supported memory type | DDR4-2400 + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |