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{{amd title|Ryzen Threadripper 1950X}} | {{amd title|Ryzen Threadripper 1950X}} | ||
− | {{ | + | {{chip |
|name=Ryzen Threadripper 1950X | |name=Ryzen Threadripper 1950X | ||
|no image=Yes | |no image=Yes | ||
− | |||
|designer=AMD | |designer=AMD | ||
|manufacturer=GlobalFoundries | |manufacturer=GlobalFoundries | ||
|model number=1950X | |model number=1950X | ||
+ | |part number=YD195XA8AEWOF | ||
|market=Desktop | |market=Desktop | ||
+ | |first announced=July 13, 2017 | ||
+ | |first launched=August 10, 2017 | ||
+ | |release price=$999 | ||
|family=Ryzen Threadripper | |family=Ryzen Threadripper | ||
|series=Ryzen | |series=Ryzen | ||
|locked=No | |locked=No | ||
|frequency=3,400 MHz | |frequency=3,400 MHz | ||
− | |turbo frequency1= | + | |turbo frequency1=4,000 MHz |
|bus links=4 | |bus links=4 | ||
|bus rate=8 GT/s | |bus rate=8 GT/s | ||
|clock multiplier=34 | |clock multiplier=34 | ||
+ | |cpuid=0x00800F11 | ||
|isa=x86-64 | |isa=x86-64 | ||
|isa family=x86 | |isa family=x86 | ||
|microarch=Zen | |microarch=Zen | ||
|chipset=Promontory | |chipset=Promontory | ||
+ | |core name=Whitehaven | ||
|core family=23 | |core family=23 | ||
|core model=1 | |core model=1 | ||
− | |core stepping= | + | |core stepping=B1 |
|process=14 nm | |process=14 nm | ||
|transistors=9,600,000,000 | |transistors=9,600,000,000 | ||
|technology=CMOS | |technology=CMOS | ||
− | |die area= | + | |die area=213 mm² |
− | |||
− | |||
|mcp=Yes | |mcp=Yes | ||
|die count=2 | |die count=2 | ||
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|thread count=32 | |thread count=32 | ||
|max cpus=1 | |max cpus=1 | ||
− | |max memory= | + | |max memory=2 TiB |
− | |tdp= | + | |tdp=180 W |
− | |package | + | |package name 1=amd,socket_tr4 |
+ | |successor=Threadripper 2950X | ||
+ | |successor link=amd/ryzen_threadripper/2950x | ||
+ | }} | ||
+ | '''Ryzen Threadripper 1950X''' is a {{arch|64}} [[hexadeca-core]] high-performance [[x86]] desktop [[microprocessor]] introduced by [[AMD]] in mid-[[2017]]. The 1950X, which is based on their {{amd|Zen|Zen microarchitecture|l=arch}}, is fabricated on a [[14 nm process]]. This processor operates at a base frequency of 3.4 GHz with a [[TDP]] of 180 W and a {{amd|Precision Boost|boost}} frequency of up to 4 GHz. This MPU supports up to 2 TiB of quad-channel DDR4-2666 memory. | ||
+ | |||
+ | == Cache == | ||
+ | {{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=1.5 MiB | ||
+ | |l1i cache=1 MiB | ||
+ | |l1i break=16x64 KiB | ||
+ | |l1i desc=4-way set associative | ||
+ | |l1d cache=512 KiB | ||
+ | |l1d break=16x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l1d policy=write-back | ||
+ | |l2 cache=8 MiB | ||
+ | |l2 break=16x512 KiB | ||
+ | |l2 desc=8-way set associative | ||
+ | |l2 policy=write-back | ||
+ | |l3 cache=32 MiB | ||
+ | |l3 break=4x8 MiB | ||
+ | |l3 desc=16-way set associative | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | This processor supports up to 512 GiB per memory channel for a total of 2 TiB. | ||
+ | {{memory controller | ||
+ | |type=DDR4-2666 | ||
+ | |ecc=Yes | ||
+ | |max mem=2 TiB | ||
+ | |controllers=4 | ||
+ | |channels=4 | ||
+ | |max bandwidth=79.47 GiB/s | ||
+ | |bandwidth schan=19.87 GiB/s | ||
+ | |bandwidth dchan=39.74 GiB/s | ||
+ | |bandwidth qchan=79.47 GiB/s | ||
+ | }} | ||
+ | |||
+ | {{amd ryzen threadripper memory configs}} | ||
+ | |||
+ | == Expansions == | ||
+ | This processor includes 60 PCIe lanes with PHY of 16 lanes may each have a maximum of 8 PCIe ports (x1, x2, x4, x8, x16). | ||
+ | {{expansions | ||
+ | | pcie revision = 3.0 | ||
+ | | pcie lanes = 60 | ||
+ | | pcie config = x16 | ||
+ | | pcie config 2 = x8 | ||
+ | | pcie config 3 = x4 | ||
+ | | pcie config 4 = x1 | ||
+ | }} | ||
+ | * eMMC, LPC, SMBus, SPI/eSPI | ||
+ | |||
+ | == Graphics == | ||
+ | This processor has no integrated graphics. | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=Yes | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
+ | |||
+ | |abm=Yes | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=Yes | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=No | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=No | ||
+ | |vtd=No | ||
+ | |ept=No | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=Yes | ||
+ | |amdv=Yes | ||
+ | |amdsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=Yes | ||
+ | |sensemi=Yes | ||
+ | |xfr=Yes | ||
+ | }} | ||
+ | |||
+ | * This model has full {{amd|XFR}} support, allowing for an additional +[[amd xfr headroom::200 MHz]] boost frequency. | ||
+ | |||
+ | == Frequencies == | ||
+ | {{see also|amd/frequency_behavior|l1=AMD's CPU Frequency Behavior}} | ||
+ | Beyond the frequencies shown below, with a sufficiently good cooling, this processor has {{amd|XFR}} suport for +200 MHz. That is, with good enough cooling, this processor can reach 4.2 GHz on up to four cores. | ||
+ | {{frequency table | ||
+ | |freq_base=3,400 MHz | ||
+ | |freq_1=4,000 MHz | ||
+ | |freq_2=4,000 MHz | ||
+ | |freq_3=4,000 MHz | ||
+ | |freq_4=4,000 MHz | ||
+ | |freq_5=3,700 MHz | ||
+ | |freq_6=3,700 MHz | ||
+ | |freq_7=3,700 MHz | ||
+ | |freq_8=3,700 MHz | ||
+ | |freq_9=3,700 MHz | ||
+ | |freq_10=3,700 MHz | ||
+ | |freq_11=3,700 MHz | ||
+ | |freq_12=3,700 MHz | ||
+ | |freq_13=3,700 MHz | ||
+ | |freq_14=3,700 MHz | ||
+ | |freq_15=3,700 MHz | ||
+ | |freq_16=3,700 MHz | ||
}} | }} | ||
− |
Latest revision as of 11:49, 5 August 2019
Edit Values | |
Ryzen Threadripper 1950X | |
General Info | |
Designer | AMD |
Manufacturer | GlobalFoundries |
Model Number | 1950X |
Part Number | YD195XA8AEWOF |
Market | Desktop |
Introduction | July 13, 2017 (announced) August 10, 2017 (launched) |
Release Price | $999 |
Shop | Amazon |
General Specs | |
Family | Ryzen Threadripper |
Series | Ryzen |
Locked | No |
Frequency | 3,400 MHz |
Turbo Frequency | 4,000 MHz (1 core) |
Bus rate | 4 × 8 GT/s |
Clock multiplier | 34 |
CPUID | 0x00800F11 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen |
Chipset | Promontory |
Core Name | Whitehaven |
Core Family | 23 |
Core Model | 1 |
Core Stepping | B1 |
Process | 14 nm |
Transistors | 9,600,000,000 |
Technology | CMOS |
Die | 213 mm² |
MCP | Yes (2 dies) |
Word Size | 64 bit |
Cores | 16 |
Threads | 32 |
Max Memory | 2 TiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 180 W |
Packaging | |
Package | TR4, FCLGA-4094 (FC-OLGA) |
Dimension | 75.4 mm × 58.5 mm × 6.26 mm |
Pitch | 0.87 mm × 1 mm |
Contacts | 4094 |
Socket | TR4, SP3r2, sTR4 |
Succession | |
Ryzen Threadripper 1950X is a 64-bit hexadeca-core high-performance x86 desktop microprocessor introduced by AMD in mid-2017. The 1950X, which is based on their Zen microarchitecture, is fabricated on a 14 nm process. This processor operates at a base frequency of 3.4 GHz with a TDP of 180 W and a boost frequency of up to 4 GHz. This MPU supports up to 2 TiB of quad-channel DDR4-2666 memory.
Cache[edit]
- Main article: Zen § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
This processor supports up to 512 GiB per memory channel for a total of 2 TiB.
Integrated Memory Controller
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[Edit] Official AMD Supported Memory Configurations | ||||
---|---|---|---|---|
Quad Channel | Single Rank | 1 DIMM per channel | 4 of 8 | DDR4-2666 |
2 DIMMs per channel | 8 of 8 | DDR4-2133 | ||
Dual Rank | 1 DIMM per channel | 4 of 8 | DDR4-2400 | |
2 DIMMs per channel | 8 of 8 | DDR4-1866 |
Expansions[edit]
This processor includes 60 PCIe lanes with PHY of 16 lanes may each have a maximum of 8 PCIe ports (x1, x2, x4, x8, x16).
Expansion Options
|
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- eMMC, LPC, SMBus, SPI/eSPI
Graphics[edit]
This processor has no integrated graphics.
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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- This model has full XFR support, allowing for an additional +200 MHz0.2 GHzboost frequency.
200,000 kHz
Frequencies[edit]
- See also: AMD's CPU Frequency Behavior
Beyond the frequencies shown below, with a sufficiently good cooling, this processor has XFR suport for +200 MHz. That is, with good enough cooling, this processor can reach 4.2 GHz on up to four cores.
Mode | Base | Turbo Frequency/Active Cores | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | ||
Normal | 3,400 MHz | 4,000 MHz | 4,000 MHz | 4,000 MHz | 4,000 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz |
l1$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 1,024 KiB (1,048,576 B, 1 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) + |