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Difference between revisions of "intel/core i9/i9-7900x"
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{{intel title|Core i9-7900X}} | {{intel title|Core i9-7900X}} | ||
− | {{ | + | {{chip |
− | | name | + | |name=Core i9-7900X |
− | | no image | + | |no image=No |
− | + | |image=skylake x (front).png | |
− | | image | + | |designer=Intel |
− | + | |manufacturer=Intel | |
− | | designer | + | |model number=i9-7900X |
− | | manufacturer | + | |part number=BX80673I97900X |
− | | model number | + | |part number 2=BXC80673I97900X |
− | | part number | + | |part number 3=CD8067303286804 |
− | + | |s-spec=SR3L2 | |
− | | part number 2 | + | |market=Desktop |
− | | part number 3 | + | |first announced=May 30, 2017 |
− | + | |first launched=June 26, 2017 | |
− | + | |release price=$999 | |
− | | s-spec | + | |family=Core i9 |
− | | market | + | |series=i9-7000 |
− | | first announced | + | |locked=No |
− | | first launched | + | |frequency=3,300 MHz |
− | | | + | |turbo frequency1=4,300 MHz |
− | | | + | |turbo frequency2=4,300 MHz |
− | | | + | |turbo frequency=Yes |
+ | |bus type=DMI 3.0 | ||
+ | |bus links=4 | ||
+ | |bus rate=8 GT/s | ||
+ | |clock multiplier=33 | ||
+ | |isa=x86-64 | ||
+ | |isa family=x86 | ||
+ | |microarch=Skylake (server) | ||
+ | |platform=Skylake | ||
+ | |chipset=Lewisburg | ||
+ | |core name=Skylake X | ||
+ | |core family=6 | ||
+ | |core model=85 | ||
+ | |core stepping=U0 | ||
+ | |process=14 nm | ||
+ | |technology=CMOS | ||
+ | |word size=64 bit | ||
+ | |core count=10 | ||
+ | |thread count=20 | ||
+ | |max cpus=1 | ||
+ | |max memory=128 GiB | ||
+ | |tdp=140 W | ||
+ | |tjunc min=0 °C | ||
+ | |tjunc max=95 °C | ||
+ | |tstorage min=-25 °C | ||
+ | |tstorage max=125 °C | ||
+ | |package name 1=intel,fclga_2066 | ||
+ | }} | ||
+ | '''Core i9-7900X''' is a {{arch|64}} [[deca-core]] high-performance [[x86]] desktop microprocessor introduced by [[Intel]] in mid-[[2017]]. This chip, which is based on the {{intel|Skylake|l=arch}} microarchitecture, is fabricated on Intel's enhanced [[14 nm process|14nm+ process]]. The i9-7900X operates at 3.3 GHz with a TDP of 140 W and a {{intel|Turbo Boost}} frequency of 4.3 GHz. The processor supports up to 128 GiB of quad-channel DDR4-2666 memory. | ||
− | | | + | In addition to its {{intel|Turbo Boost}} frequency, the i9-7900X has a {{intel|Turbo Max}} frequency of {{set tbmt|4.5 GHz}}. |
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− | + | == Cache == | |
− | | | + | {{main|intel/microarchitectures/skylake_(server)#Memory_Hierarchy|l1=Skylake § Cache}} |
− | | | + | {{cache size |
− | | | + | |l1 cache=640 KiB |
− | | | + | |l1i cache=320 KiB |
− | | | + | |l1i break=10x32 KiB |
− | | | + | |l1i desc=8-way set associative |
− | | | + | |l1d cache=320 KiB |
− | | | + | |l1d break=10x32 KiB |
− | | | + | |l1d desc=8-way set associative |
− | | | + | |l1d policy=write-back |
− | | | + | |l2 cache=10 MiB |
− | | | + | |l2 break=10x1 MiB |
− | | | + | |l2 desc=16-way set associative |
− | | | + | |l2 policy=write-back |
− | | | + | |l3 cache=13.75 MiB |
− | | | + | |l3 break=10x1.375 MiB |
− | | | + | |l3 desc=11-way set associative |
− | | | + | |l3 policy=write-back |
− | + | }} | |
− | | | + | == Memory controller == |
− | | | + | {{memory controller |
− | | | + | |type=DDR4-2666 |
− | | | + | |ecc=No |
− | | | + | |max mem=128 GiB |
− | | | + | |channels=4 |
− | | | + | |max bandwidth=79.47 GiB/s |
− | | | + | |bandwidth schan=19.89 GiB/s |
− | | | + | |bandwidth dchan=39.72 GiB/s |
− | | | + | |bandwidth qchan=79.47 GiB/s |
− | | | + | }} |
− | | | + | |
− | | | + | == Expansions == |
− | | | + | {{expansions main |
− | | | + | | |
− | | | + | {{expansions entry |
− | | | + | |type=PCIe |
− | | | + | |pcie revision=3.0 |
− | | | + | |pcie lanes=44 |
− | | | + | |pcie config=x16 |
+ | |pcie config 2=x8 | ||
+ | |pcie config 3=x4 | ||
+ | }} | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | This processor has no integrated graphics. | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
+ | |avx512f=Yes | ||
+ | |avx512cd=Yes | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=Yes | ||
+ | |avx512dq=Yes | ||
+ | |avx512vl=Yes | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |avx512units=2 | ||
+ | |abm=Yes | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |tbt1=No | ||
+ | |tbt2=Yes | ||
+ | |tbmt3=Yes | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=Yes | ||
+ | |txt=No | ||
+ | |ht=Yes | ||
+ | |vpro=No | ||
+ | |vtx=Yes | ||
+ | |vtd=Yes | ||
+ | |ept=Yes | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
+ | |xfr2=No | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=No | ||
+ | |amdpbod=No | ||
+ | }} | ||
− | + | == Frequencies == | |
+ | {{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}} | ||
+ | {{frequency table | ||
+ | |freq_base=3,300 MHz | ||
+ | |freq_1=4,300 MHz | ||
+ | |freq_2=4,300 MHz | ||
+ | |freq_3=4,100 MHz | ||
+ | |freq_4=4,100 MHz | ||
+ | |freq_5=4,000 MHz | ||
+ | |freq_6=4,000 MHz | ||
+ | |freq_7=4,000 MHz | ||
+ | |freq_8=4,000 MHz | ||
+ | |freq_9=4,000 MHz | ||
+ | |freq_10=4,000 MHz | ||
}} | }} | ||
− |
Latest revision as of 09:13, 4 April 2019
Edit Values | |
Core i9-7900X | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | i9-7900X |
Part Number | BX80673I97900X, BXC80673I97900X, CD8067303286804 |
S-Spec | SR3L2 |
Market | Desktop |
Introduction | May 30, 2017 (announced) June 26, 2017 (launched) |
Release Price | $999 |
Shop | Amazon |
General Specs | |
Family | Core i9 |
Series | i9-7000 |
Locked | No |
Frequency | 3,300 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 4,300 MHz (1 core), 4,300 MHz (2 cores) |
Bus type | DMI 3.0 |
Bus rate | 4 × 8 GT/s |
Clock multiplier | 33 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Skylake (server) |
Platform | Skylake |
Chipset | Lewisburg |
Core Name | Skylake X |
Core Family | 6 |
Core Model | 85 |
Core Stepping | U0 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 10 |
Threads | 20 |
Max Memory | 128 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 140 W |
Tjunction | 0 °C – 95 °C |
Tstorage | -25 °C – 125 °C |
Packaging | |
Package | FCLGA-2066 (LGA) |
Dimension | 52.5 mm × 45 mm |
Pitch | 1.016 mm |
Contacts | 2066 |
Socket | Socket R4 |
Core i9-7900X is a 64-bit deca-core high-performance x86 desktop microprocessor introduced by Intel in mid-2017. This chip, which is based on the Skylake microarchitecture, is fabricated on Intel's enhanced 14nm+ process. The i9-7900X operates at 3.3 GHz with a TDP of 140 W and a Turbo Boost frequency of 4.3 GHz. The processor supports up to 128 GiB of quad-channel DDR4-2666 memory.
In addition to its Turbo Boost frequency, the i9-7900X has a Turbo Max frequency of 4.5 GHz.
Cache[edit]
- Main article: Skylake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options |
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Graphics[edit]
This processor has no integrated graphics.
Features[edit]
[Edit/Modify Supported Features]
Frequencies[edit]
- See also: Intel's CPU Frequency Behavior
Mode | Base | Turbo Frequency/Active Cores | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | ||
Normal | 3,300 MHz | 4,300 MHz | 4,300 MHz | 4,100 MHz | 4,100 MHz | 4,000 MHz | 4,000 MHz | 4,000 MHz | 4,000 MHz | 4,000 MHz | 4,000 MHz |
Facts about "Core i9-7900X - Intel"
l1$ size | 640 KiB (655,360 B, 0.625 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 320 KiB (327,680 B, 0.313 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 320 KiB (327,680 B, 0.313 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 10 MiB (10,240 KiB, 10,485,760 B, 0.00977 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 13.75 MiB (14,080 KiB, 14,417,920 B, 0.0134 GiB) + |