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Difference between revisions of "intel/xeon gold/6154"
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{{intel title|Xeon Gold 6154}} | {{intel title|Xeon Gold 6154}} | ||
− | {{ | + | {{chip |
− | + | |name=Xeon Gold 6154 | |
− | | name | + | |image=skylake sp (basic).png |
− | + | |designer=Intel | |
− | | image | + | |manufacturer=Intel |
− | + | |model number=6154 | |
− | + | |part number=CD8067303592700 | |
− | | designer | + | |s-spec=SR3J5 |
− | | manufacturer | + | |s-spec qs=QMQ9 |
− | | model number | + | |market=Server |
− | | part number | + | |first announced=April 25, 2017 |
− | + | |first launched=July 11, 2017 | |
− | + | |release price=$3,543.00 | |
− | | s-spec | + | |family=Xeon Gold |
− | | s-spec | + | |series=6100 |
− | | market | + | |locked=Yes |
− | | first announced | + | |frequency=3,000 MHz |
− | | first launched | + | |turbo frequency1=3,700 MHz |
− | | | + | |bus type=DMI 3.0 |
− | | | + | |bus links=4 |
− | | | + | |bus rate=8 GT/s |
+ | |clock multiplier=30 | ||
+ | |cpuid=0x50654 | ||
+ | |isa=x86-64 | ||
+ | |isa family=x86 | ||
+ | |microarch=Skylake (server) | ||
+ | |platform=Purley | ||
+ | |chipset=Lewisburg | ||
+ | |core name=Skylake SP | ||
+ | |core family=6 | ||
+ | |core stepping=H0 | ||
+ | |process=14 nm | ||
+ | |technology=CMOS | ||
+ | |word size=64 bit | ||
+ | |core count=18 | ||
+ | |thread count=36 | ||
+ | |max memory=768 GiB | ||
+ | |max cpus=4 | ||
+ | |smp interconnect=UPI | ||
+ | |smp interconnect links=3 | ||
+ | |smp interconnect rate=10.4 GT/s | ||
+ | |tdp=200 W | ||
+ | |tcase min=0 °C | ||
+ | |tcase max=82 °C | ||
+ | |dts min=0 °C | ||
+ | |dts max=106 °C | ||
+ | |package name 1=intel,fclga_3647 | ||
+ | |successor=Xeon Gold 6254 | ||
+ | |successor link=intel/xeon_gold/6254 | ||
+ | }} | ||
+ | '''Xeon Gold 6154''' is a {{arch|64}} [[18-core]] [[x86]] multi-socket high performance server microprocessor introduced by [[Intel]] in mid-2017. This chip supports up to 4-way multiprocessing. The Gold 6154, which is based on the server configuration of the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 3 GHz with a TDP of 200 W and a {{intel|turbo boost}} frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory. | ||
− | + | == Cache == | |
− | | | + | {{main|intel/microarchitectures/skylake_(server)#Memory_Hierarchy|l1=Skylake § Cache}} |
− | + | {{cache size | |
− | | | + | |l1 cache=1.125 MiB |
− | | | + | |l1i cache=576 KiB |
− | | | + | |l1i break=18x32 KiB |
− | | | + | |l1i desc=8-way set associative |
− | | | + | |l1d cache=576 KiB |
− | | | + | |l1d break=18x32 KiB |
− | | | + | |l1d desc=8-way set associative |
− | | | + | |l1d policy=write-back |
− | | | + | |l2 cache=18 MiB |
− | | | + | |l2 break=18x1 MiB |
− | | | + | |l2 desc=16-way set associative |
− | | | + | |l2 policy=write-back |
− | | | + | |l3 cache=24.75 MiB |
− | | | + | |l3 break=18x1.375 MiB |
− | | | + | |l3 desc=11-way set associative |
− | | | + | |l3 policy=write-back |
− | + | }} | |
− | + | == Memory controller == | |
− | + | {{memory controller | |
− | + | |type=DDR4-2666 | |
− | + | |ecc=Yes | |
− | + | |max mem=768 GiB | |
− | | | + | |controllers=2 |
− | | | + | |channels=6 |
− | | | + | |max bandwidth=119.21 GiB/s |
− | | | + | |bandwidth schan=19.87 GiB/s |
− | | | + | |bandwidth dchan=39.74 GiB/s |
− | | | + | |bandwidth qchan=79.47 GiB/s |
− | | | + | |bandwidth hchan=119.21 GiB/s |
− | | | + | }} |
− | | | ||
− | | | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | + | == Expansions == | |
− | + | {{expansions | |
− | + | | pcie revision = 3.0 | |
− | + | | pcie lanes = 48 | |
− | + | | pcie config = x16 | |
− | | | + | | pcie config 2 = x8 |
− | + | | pcie config 3 = x4 | |
− | + | }} | |
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | | | ||
− | | | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
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− | |||
− | |||
− | |||
− | | | ||
− | | | ||
− | |||
− | | | + | == Features == |
− | | | + | {{x86 features |
− | + | |real=Yes | |
− | | | + | |protected=Yes |
− | | | + | |smm=Yes |
− | | | + | |fpu=Yes |
− | | | + | |x8616=Yes |
− | | | + | |x8632=Yes |
− | | | + | |x8664=Yes |
− | | | + | |nx=Yes |
− | | | + | |mmx=Yes |
− | | | + | |emmx=Yes |
− | | | + | |sse=Yes |
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
+ | |avx512f=Yes | ||
+ | |avx512cd=Yes | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=Yes | ||
+ | |avx512dq=Yes | ||
+ | |avx512vl=Yes | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |abm=Yes | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |tbt1=No | ||
+ | |tbt2=Yes | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=Yes | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=Yes | ||
+ | |intelnodecontroller=Yes | ||
+ | |intelnode=Yes | ||
+ | |kpt=Yes | ||
+ | |ptt=Yes | ||
+ | |intelrunsure=Yes | ||
+ | |mbe=Yes | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=Yes | ||
+ | |txt=Yes | ||
+ | |ht=Yes | ||
+ | |vpro=Yes | ||
+ | |vtx=Yes | ||
+ | |vtd=Yes | ||
+ | |ept=Yes | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
}} | }} | ||
− | |||
+ | == Frequencies == | ||
+ | {{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}} | ||
+ | {{frequency table | ||
+ | |freq_base=3,000 MHz | ||
+ | |freq_1=3,700 MHz | ||
+ | |freq_2=3,700 MHz | ||
+ | |freq_3=3,700 MHz | ||
+ | |freq_4=3,700 MHz | ||
+ | |freq_5=3,700 MHz | ||
+ | |freq_6=3,700 MHz | ||
+ | |freq_7=3,700 MHz | ||
+ | |freq_8=3,700 MHz | ||
+ | |freq_9=3,700 MHz | ||
+ | |freq_10=3,700 MHz | ||
+ | |freq_11=3,700 MHz | ||
+ | |freq_12=3,700 MHz | ||
+ | |freq_13=3,700 MHz | ||
+ | |freq_14=3,700 MHz | ||
+ | |freq_15=3,700 MHz | ||
+ | |freq_16=3,700 MHz | ||
+ | |freq_17=3,700 MHz | ||
+ | |freq_18=3,700 MHz | ||
+ | |freq_avx2_base=2,600 MHz | ||
+ | |freq_avx2_1=3,600 MHz | ||
+ | |freq_avx2_2=3,600 MHz | ||
+ | |freq_avx2_3=3,400 MHz | ||
+ | |freq_avx2_4=3,400 MHz | ||
+ | |freq_avx2_5=3,300 MHz | ||
+ | |freq_avx2_6=3,300 MHz | ||
+ | |freq_avx2_7=3,300 MHz | ||
+ | |freq_avx2_8=3,300 MHz | ||
+ | |freq_avx2_9=3,300 MHz | ||
+ | |freq_avx2_10=3,300 MHz | ||
+ | |freq_avx2_11=3,300 MHz | ||
+ | |freq_avx2_12=3,300 MHz | ||
+ | |freq_avx2_13=3,300 MHz | ||
+ | |freq_avx2_14=3,300 MHz | ||
+ | |freq_avx2_15=3,300 MHz | ||
+ | |freq_avx2_16=3,300 MHz | ||
+ | |freq_avx2_17=3,300 MHz | ||
+ | |freq_avx2_18=3,300 MHz | ||
+ | |freq_avx512_base=2,100 MHz | ||
+ | |freq_avx512_1=3,500 MHz | ||
+ | |freq_avx512_2=3,500 MHz | ||
+ | |freq_avx512_3=3,300 MHz | ||
+ | |freq_avx512_4=3,300 MHz | ||
+ | |freq_avx512_5=3,200 MHz | ||
+ | |freq_avx512_6=3,200 MHz | ||
+ | |freq_avx512_7=3,200 MHz | ||
+ | |freq_avx512_8=3,200 MHz | ||
+ | |freq_avx512_9=3,100 MHz | ||
+ | |freq_avx512_10=3,100 MHz | ||
+ | |freq_avx512_11=3,100 MHz | ||
+ | |freq_avx512_12=3,100 MHz | ||
+ | |freq_avx512_13=2,800 MHz | ||
+ | |freq_avx512_14=2,800 MHz | ||
+ | |freq_avx512_15=2,800 MHz | ||
+ | |freq_avx512_16=2,800 MHz | ||
+ | |freq_avx512_17=2,700 MHz | ||
+ | |freq_avx512_18=2,700 MHz | ||
+ | }} | ||
+ | |||
+ | == Benchmarks == | ||
+ | {{benchmarks main | ||
+ | | | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171003-00097.html|test_timestamp=2017-09-30 12:20:22-0400|chip_count=2|core_count=36|thread_count=36|vendor=Cisco Systems|system=Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)|SPECspeed2017_int_base=8.92|SPECspeed2017_int_peak=9.16}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171003-00098.html|test_timestamp=2017-09-30 17:20:13-0400|chip_count=2|core_count=36|thread_count=36|vendor=Cisco Systems|system=Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)|SPECspeed2017_fp_base=121|SPECspeed2017_fp_peak=122}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00129.html|test_timestamp=2017-10-11 07:31:37-0400|chip_count=2|core_count=36|thread_count=36|vendor=HPE|system=ProLiant DL380 Gen10 (3.00 GHz, Intel Xeon Gold 6154)|SPECspeed2017_fp_base=120|SPECspeed2017_fp_peak=}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00130.html|test_timestamp=2017-10-10 07:53:35-0400|chip_count=2|core_count=36|thread_count=36|vendor=HPE|system=ProLiant DL380 Gen10 (3.00 GHz, Intel Xeon Gold 6154)|SPECspeed2017_int_base=8.83|SPECspeed2017_int_peak=}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00134.html|test_timestamp=2017-10-11 13:56:41-0400|chip_count=2|core_count=36|copies_count=72|vendor=HPE|system=ProLiant DL380 Gen10 (3.00 GHz, Intel Xeon Gold 6154)|SPECrate2017_fp_base=198|SPECrate2017_fp_peak=}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00142.html|test_timestamp=2017-10-11 09:02:52-0400|chip_count=2|core_count=36|copies_count=72|vendor=HPE|system=ProLiant DL380 Gen10 (3.00 GHz, Intel Xeon Gold 6154)|SPECrate2017_int_base=213|SPECrate2017_int_peak=}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00314.html|test_timestamp=2017-10-26 14:43:55-0400|chip_count=2|core_count=36|thread_count=36|vendor=HPE|system=Synergy 480 Gen10 (3.00 GHz, Intel Xeon Gold 6154)|SPECspeed2017_int_base=8.75|SPECspeed2017_int_peak=}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00341.html|test_timestamp=2017-10-26 17:18:51-0400|chip_count=2|core_count=36|thread_count=36|vendor=HPE|system=Synergy 480 Gen10 (3.00 GHz, Intel Xeon Gold 6154)|SPECspeed2017_fp_base=119|SPECspeed2017_fp_peak=}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00425.html|test_timestamp=2017-10-26 01:03:45-0400|chip_count=2|core_count=36|copies_count=72|vendor=Cisco Systems|system=Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)|SPECrate2017_fp_base=202|SPECrate2017_fp_peak=206}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00426.html|test_timestamp=2017-10-26 19:47:49-0400|chip_count=2|core_count=36|copies_count=72|vendor=Cisco Systems|system=Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)|SPECrate2017_int_base=209|SPECrate2017_int_peak=221}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00427.html|test_timestamp=2017-10-27 06:32:11-0400|chip_count=2|core_count=36|thread_count=36|vendor=Cisco Systems|system=Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)|SPECspeed2017_int_base=8.88|SPECspeed2017_int_peak=9.14}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00428.html|test_timestamp=2017-10-27 11:32:49-0400|chip_count=2|core_count=36|thread_count=36|vendor=Cisco Systems|system=Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)|SPECspeed2017_fp_base=121|SPECspeed2017_fp_peak=122}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00458.html|test_timestamp=2017-10-25 11:16:42-0400|chip_count=2|core_count=36|copies_count=72|vendor=HPE|system=Synergy 480 Gen10 (3.00 GHz, Intel Xeon Gold 6154)|SPECrate2017_int_base=211|SPECrate2017_int_peak=}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00467.html|test_timestamp=2017-10-25 16:10:34-0400|chip_count=2|core_count=36|copies_count=72|vendor=HPE|system=Synergy 480 Gen10 (3.00 GHz, Intel Xeon Gold 6154)|SPECrate2017_fp_base=196|SPECrate2017_fp_peak=}} | ||
+ | }} | ||
− | + | [[Category:microprocessor models by intel based on skylake extreme core count die]] |
Latest revision as of 01:57, 29 December 2019
Edit Values | |
Xeon Gold 6154 | |
![]() | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | 6154 |
Part Number | CD8067303592700 |
S-Spec | SR3J5 QMQ9 (QS) |
Market | Server |
Introduction | April 25, 2017 (announced) July 11, 2017 (launched) |
Release Price | $3,543.00 |
Shop | Amazon |
General Specs | |
Family | Xeon Gold |
Series | 6100 |
Locked | Yes |
Frequency | 3,000 MHz |
Turbo Frequency | 3,700 MHz (1 core) |
Bus type | DMI 3.0 |
Bus rate | 4 × 8 GT/s |
Clock multiplier | 30 |
CPUID | 0x50654 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Skylake (server) |
Platform | Purley |
Chipset | Lewisburg |
Core Name | Skylake SP |
Core Family | 6 |
Core Stepping | H0 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 18 |
Threads | 36 |
Max Memory | 768 GiB |
Multiprocessing | |
Max SMP | 4-Way (Multiprocessor) |
Interconnect | UPI |
Interconnect Links | 3 |
Interconnect Rate | 10.4 GT/s |
Electrical | |
TDP | 200 W |
Tcase | 0 °C – 82 °C |
TDTS | 0 °C – 106 °C |
Packaging | |
Package | FCLGA-3647 (FCLGA) |
Dimension | 76.16 mm × 56.6 mm |
Pitch | 0.8585 mm × 0.9906 mm |
Contacts | 3647 |
Socket | Socket P, LGA-3647 |
Succession | |
Xeon Gold 6154 is a 64-bit 18-core x86 multi-socket high performance server microprocessor introduced by Intel in mid-2017. This chip supports up to 4-way multiprocessing. The Gold 6154, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm+ process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 3 GHz with a TDP of 200 W and a turbo boost frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.
Cache[edit]
- Main article: Skylake § Cache
![]() |
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
![]() |
Integrated Memory Controller
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Expansions[edit]
![]() |
Expansion Options
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Features[edit]
[Edit/Modify Supported Features]
![]() |
Supported x86 Extensions & Processor Features
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Frequencies[edit]
- See also: Intel's CPU Frequency Behavior
Mode | Base | Turbo Frequency/Active Cores | |||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | ||
Normal | 3,000 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz |
AVX2 | 2,600 MHz | 3,600 MHz | 3,600 MHz | 3,400 MHz | 3,400 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz |
AVX512 | 2,100 MHz | 3,500 MHz | 3,500 MHz | 3,300 MHz | 3,300 MHz | 3,200 MHz | 3,200 MHz | 3,200 MHz | 3,200 MHz | 3,100 MHz | 3,100 MHz | 3,100 MHz | 3,100 MHz | 2,800 MHz | 2,800 MHz | 2,800 MHz | 2,800 MHz | 2,700 MHz | 2,700 MHz |
Benchmarks[edit]
Test: SPEC CPU2017
Tested: 2017-09-30 12:20:22-0400
Chips: 2, Cores: 36, Threads: 36
Vendor: Cisco Systems
System: Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)
Tested: 2017-09-30 12:20:22-0400
Chips: 2, Cores: 36, Threads: 36
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)
SPECspeed2017_int_base: 8.92
SPECspeed2017_int_peak: 9.16
Test: SPEC CPU2017
Tested: 2017-09-30 17:20:13-0400
Chips: 2, Cores: 36, Threads: 36
Vendor: Cisco Systems
System: Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)
Tested: 2017-09-30 17:20:13-0400
Chips: 2, Cores: 36, Threads: 36
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)
SPECspeed2017_fp_base: 121
SPECspeed2017_fp_peak: 122
Test: SPEC CPU2017
Tested: 2017-10-11 07:31:37-0400
Chips: 2, Cores: 36, Threads: 36
Vendor: HPE
System: ProLiant DL380 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
Tested: 2017-10-11 07:31:37-0400
Chips: 2, Cores: 36, Threads: 36
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: ProLiant DL380 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
SPECspeed2017_fp_base: 120
Test: SPEC CPU2017
Tested: 2017-10-10 07:53:35-0400
Chips: 2, Cores: 36, Threads: 36
Vendor: HPE
System: ProLiant DL380 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
Tested: 2017-10-10 07:53:35-0400
Chips: 2, Cores: 36, Threads: 36
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: ProLiant DL380 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
SPECspeed2017_int_base: 8.83
Test: SPEC CPU2017
Tested: 2017-10-11 13:56:41-0400
Chips: 2, Cores: 36, Copies: 72
Vendor: HPE
System: ProLiant DL380 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
Tested: 2017-10-11 13:56:41-0400
Chips: 2, Cores: 36, Copies: 72
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: ProLiant DL380 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
SPECrate2017_fp_base: 198
Test: SPEC CPU2017
Tested: 2017-10-11 09:02:52-0400
Chips: 2, Cores: 36, Copies: 72
Vendor: HPE
System: ProLiant DL380 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
Tested: 2017-10-11 09:02:52-0400
Chips: 2, Cores: 36, Copies: 72
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: ProLiant DL380 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
SPECrate2017_int_base: 213
Test: SPEC CPU2017
Tested: 2017-10-26 14:43:55-0400
Chips: 2, Cores: 36, Threads: 36
Vendor: HPE
System: Synergy 480 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
Tested: 2017-10-26 14:43:55-0400
Chips: 2, Cores: 36, Threads: 36
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: Synergy 480 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
SPECspeed2017_int_base: 8.75
Test: SPEC CPU2017
Tested: 2017-10-26 17:18:51-0400
Chips: 2, Cores: 36, Threads: 36
Vendor: HPE
System: Synergy 480 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
Tested: 2017-10-26 17:18:51-0400
Chips: 2, Cores: 36, Threads: 36
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: Synergy 480 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
SPECspeed2017_fp_base: 119
Test: SPEC CPU2017
Tested: 2017-10-26 01:03:45-0400
Chips: 2, Cores: 36, Copies: 72
Vendor: Cisco Systems
System: Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)
Tested: 2017-10-26 01:03:45-0400
Chips: 2, Cores: 36, Copies: 72
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)
SPECrate2017_fp_base: 202
SPECrate2017_fp_peak: 206
Test: SPEC CPU2017
Tested: 2017-10-26 19:47:49-0400
Chips: 2, Cores: 36, Copies: 72
Vendor: Cisco Systems
System: Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)
Tested: 2017-10-26 19:47:49-0400
Chips: 2, Cores: 36, Copies: 72
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)
SPECrate2017_int_base: 209
SPECrate2017_int_peak: 221
Test: SPEC CPU2017
Tested: 2017-10-27 06:32:11-0400
Chips: 2, Cores: 36, Threads: 36
Vendor: Cisco Systems
System: Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)
Tested: 2017-10-27 06:32:11-0400
Chips: 2, Cores: 36, Threads: 36
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)
SPECspeed2017_int_base: 8.88
SPECspeed2017_int_peak: 9.14
Test: SPEC CPU2017
Tested: 2017-10-27 11:32:49-0400
Chips: 2, Cores: 36, Threads: 36
Vendor: Cisco Systems
System: Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)
Tested: 2017-10-27 11:32:49-0400
Chips: 2, Cores: 36, Threads: 36
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: Cisco UCS B200 M5 (Intel Xeon Gold 6154, 3.00GHz)
SPECspeed2017_fp_base: 121
SPECspeed2017_fp_peak: 122
Test: SPEC CPU2017
Tested: 2017-10-25 11:16:42-0400
Chips: 2, Cores: 36, Copies: 72
Vendor: HPE
System: Synergy 480 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
Tested: 2017-10-25 11:16:42-0400
Chips: 2, Cores: 36, Copies: 72
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: Synergy 480 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
SPECrate2017_int_base: 211
Test: SPEC CPU2017
Tested: 2017-10-25 16:10:34-0400
Chips: 2, Cores: 36, Copies: 72
Vendor: HPE
System: Synergy 480 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
Tested: 2017-10-25 16:10:34-0400
Chips: 2, Cores: 36, Copies: 72
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: Synergy 480 Gen10 (3.00 GHz, Intel Xeon Gold 6154)
SPECrate2017_fp_base: 196
Facts about "Xeon Gold 6154 - Intel"