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Difference between revisions of "intel/atom/n270"
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(Fix chip type so that N270 shows up in the table of all Bonell CPUs)
 
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{{intel title|Atom N270}}
 
{{intel title|Atom N270}}
−
{{mpu
+
{{chip
−
| name               = Atom N270
+
|future=Yes
−
| no image           =  
+
|chip type=microprocessor
−
| image               = atom n270.png
+
|name=Atom N270
−
| image size          =
+
|no image=Yes
−
| caption             = Atom N270
+
|image=atom n270.png
−
| designer           = Intel
+
|caption=Atom N270
−
| manufacturer       = Intel
+
|designer=Intel
−
| model number       = N270
+
|designer 3=Summer Rogers
−
| part number         = AU80586GE025D
+
|manufacturer=Intel
−
| part number 1      =  
+
|manufacturer 3=Summer Rogers
−
| part number 2      =
+
|model number=N270
−
| part number 3      =  
+
|part number=AU80586GE025D
−
| s-spec             = SLB73
+
|s-spec=SLB73
−
| s-spec qs           =  
+
|s-spec qs=QDTD
−
| market             = Mobile
+
|s-spec qs 2=QDTB
−
| first announced     = April 2, 2008
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|s-spec qs 3=QGZT
−
| first launched     = June 3, 2008
+
|market=Mobile
−
| last order          =  
+
|first announced=April 2, 2008
−
| last shipment      =  
+
|first launched=June 3, 2008
−
| release price      = $44
+
|release price=$44
 +
|family=Atom
 +
|series=N200
 +
|locked=Yes
 +
|frequency=1,599.99 MHz
 +
|bus type=FSB
 +
|bus speed=133.33 MHz
 +
|bus rate=533.33 MT/s
 +
|clock multiplier=12
 +
|cpuid=106C2
 +
|isa=x86-32
 +
|isa family=x86
 +
|microarch=Bonnell
 +
|platform=Nettop 2008
 +
|chipset=Calistoga
 +
|core name=Diamondville
 +
|core family=6
 +
|core model=112
 +
|core stepping=C0
 +
|process=45 nm
 +
|transistors=47,212,207
 +
|technology=CMOS
 +
|die area=25.9638 mm²
 +
|die length=7.94 mm
 +
|die width=3.27 mm
 +
|word size=64 bit
 +
|core count=1
 +
|thread count=2
 +
|max memory=8 GiB
 +
|max cpus=1
 +
|v core min=0.9 V
 +
|v core max=1.1625 V
 +
|v io=1.1 V
 +
|v io tolerance=0.05 V
 +
|tdp=2.5 W
 +
|tcase min=0 °C
 +
|tcase max=85.2 °C
 +
|tstorage min=-40 °C
 +
|tstorage max=85 °C
 +
|package module 1={{packages/intel/fcbga-437}}
 +
}}
 +
'''Atom N270''' is an ultra-low power {{arch|32}} [[x86]] [[single-core]] microprocessor introduced by [[Intel]] in mid-2008. The N270 is specifically designed for nettops and various other mobile internet connected devices. This processor, which was fabricated on Intel's [[45 nm process]], was based on the {{intel|Bonnell|l=arch}} microarchitecture. The Atom N270 operates at 1.6 GHz with a TDP of 2.5 W with an average power consumption of 600 mW. The MPU features a legacy 533 MT/s [[QDR]] [[front-side bus]].
 +
 
 +
== Cache ==
 +
{{main|intel/microarchitectures/bonnell#Memory_Hierarchy|l1=Bonnell § Cache}}
 +
{{cache size
 +
|l1 cache=56 KiB
 +
|l1i cache=32 KiB
 +
|l1i break=1x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1d cache=24 KiB
 +
|l1d break=1x24 KiB
 +
|l1d desc=6-way set associative
 +
|l1d policy=write-back
 +
|l2 cache=512 KiB
 +
|l2 break=1x512 KiB
 +
|l2 desc=8-way set associative
 +
}}
  
−
| family              = Atom
+
== Memory controller ==
−
| series              = N200
+
This processor has no integrated memory controller.
−
| locked              = Yes
 
−
| frequency          = 1,599.99 MHz
 
−
| bus type            = FSB
 
−
| bus speed          = 133.33 MHz
 
−
| bus rate            = 533.33 MT/s
 
−
| bus links          =
 
−
| clock multiplier    = 12
 
−
| cpuid              = 106C2
 
  
−
| isa family          = x86
+
== Graphics ==
−
| isa                = x86-64
+
This processor has no integrated graphics.
−
| microarch          = Bonnell
 
−
| platform            = Nettop 2008
 
−
| chipset            = Calistoga
 
−
| core name          = Diamondville
 
−
| core family        = 6
 
−
| core model          = 112
 
−
| core stepping      = C0
 
−
| process            = 45 nm
 
−
| transistors        = 47,212,207
 
−
| technology          = CMOS
 
−
| die area            = 25.9638 mm²
 
−
| die width          = 3.27 mm
 
−
| die length          = 7.94 mm
 
−
| word size          = 64 bit
 
−
| core count          = 1
 
−
| thread count        = 2
 
−
| max cpus            = 1
 
−
| max memory          = 8 GiB
 
  
−
| electrical          = Yes
+
== Features ==
−
| average power      =  
+
{{x86 features
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| idle power          =  
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|real=Yes
−
| v core min          = 0.9 V
+
|protected=Yes
−
| v core max          = 1.1625 V
+
|smm=Yes
−
| v io                = 1.1 V
+
|fpu=Yes
−
| v io tolerance      = 0.05 V
+
|x8616=Yes
−
| sdp                =  
+
|x8632=Yes
−
| tdp                = 2.5 W
+
|x8664=No
−
| tjunc min          =  
+
|nx=Yes
−
| tjunc max          =  
+
|mmx=Yes
−
| tcase min          = 0 °C
+
|emmx=Yes
−
| tcase max          = 85.2 °C
+
|sse=Yes
−
| tstorage min        = -40 °C
+
|sse2=Yes
−
| tstorage max        = 85 °C
+
|sse3=Yes
−
| tambient min        =  
+
|ssse3=Yes
−
| tambient max        =  
+
|sse41=No
 +
|sse42=No
 +
|sse4a=No
 +
|avx=No
 +
|avx2=No
  
−
| package module 1    = {{packages/intel/fcbga-437}}
+
|abm=No
 +
|tbm=No
 +
|bmi1=No
 +
|bmi2=No
 +
|fma3=No
 +
|fma4=No
 +
|aes=No
 +
|rdrand=No
 +
|sha=No
 +
|xop=No
 +
|adx=No
 +
|clmul=No
 +
|f16c=No
 +
|tbt1=No
 +
|tbt2=No
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=No
 +
|fastmem=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=No
 +
|txt=No
 +
|ht=Yes
 +
|vpro=No
 +
|vtx=No
 +
|vtd=No
 +
|ept=No
 +
|mpx=No
 +
|sgx=No
 +
|securekey=No
 +
|osguard=No
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 
}}
 
}}
−
'''Atom N270''' is an ultra-low power {{arch|32}} [[x86]] [[single-core]] microprocessor introduced by [[Intel]] in mid-2008. The N270 is specifically designed for nettops and various other mobile internet connected devices. This processors, which was fabricated on Intel's [[45 nm process]], was based on the {{intel|Bonnell|l=arch}} microarchitecture. The Atom N270 operates at 1.6 GHz with a TDP of 2.5 W with an average power consumption of 600 mW. The MPU features a legacy 533 MT/s [[front-side bus]] capable of communicating with the {{intel|Poulsbo|l=chipset}} chipset in both low-power [[CMOS]] mode as well as normal [[GTL]] mode (which also works with other chipsets).
+
 
 +
== Documents ==
 +
=== Datasheets ===
 +
* [[:File:n270.pdf|Atom N270 Datasheet]], May 2008
 +
=== Other ===
 +
* [[:File:n270-specs-update.pdf|Atom N270 Specification Update]], September 2008

Latest revision as of 09:28, 23 December 2023

Edit Values
Atom N270
atom n270.png
Atom N270
General Info
DesignerIntel
ManufacturerIntel
Model NumberN270
Part NumberAU80586GE025D
S-SpecSLB73
QDTD (QS), QDTB (QS), QGZT (QS)
MarketMobile
IntroductionApril 2, 2008 (announced)
June 3, 2008 (launched)
Release Price$44
ShopAmazon
General Specs
FamilyAtom
SeriesN200
LockedYes
Frequency1,599.99 MHz
Bus typeFSB
Bus speed133.33 MHz
Bus rate533.33 MT/s
Clock multiplier12
CPUID106C2
Microarchitecture
ISAx86-32 (x86)
MicroarchitectureBonnell
PlatformNettop 2008
ChipsetCalistoga
Core NameDiamondville
Core Family6
Core Model112
Core SteppingC0
Process45 nm
Transistors47,212,207
TechnologyCMOS
Die25.9638 mm²
7.94 mm × 3.27 mm
Word Size64 bit
Cores1
Threads2
Max Memory8 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore0.9 V-1.1625 V
VI/O1.1 V ± 0.05 V
TDP2.5 W
Tcase0 °C – 85.2 °C
Tstorage-40 °C – 85 °C
Packaging
PackageFCBGA-437 (FCBGA)
Dimension22 mm x 22 mm x 1.6 mm
Pin Count437
SocketBGA-437 (BGA)

Atom N270 is an ultra-low power 32-bit x86 single-core microprocessor introduced by Intel in mid-2008. The N270 is specifically designed for nettops and various other mobile internet connected devices. This processor, which was fabricated on Intel's 45 nm process, was based on the Bonnell microarchitecture. The Atom N270 operates at 1.6 GHz with a TDP of 2.5 W with an average power consumption of 600 mW. The MPU features a legacy 533 MT/s QDR front-side bus.

Cache[edit]

Main article: Bonnell § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$56 KiB
57,344 B
0.0547 MiB
L1I$32 KiB
32,768 B
0.0313 MiB
1x32 KiB8-way set associative 
L1D$24 KiB
24,576 B
0.0234 MiB
1x24 KiB6-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  1x512 KiB8-way set associative 

Memory controller[edit]

This processor has no integrated memory controller.

Graphics[edit]

This processor has no integrated graphics.

Features[edit]

Documents[edit]

Datasheets[edit]

Other[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/atom/n270&oldid=102088"
Facts about "Atom N270 - Intel"
RDF feed
has featureHyper-Threading Technology + and Enhanced SpeedStep Technology +
has intel enhanced speedstep technologytrue +
has simultaneous multithreadingtrue +
l1$ size56 KiB (57,344 B, 0.0547 MiB) +
l1d$ description6-way set associative +
l1d$ size24 KiB (24,576 B, 0.0234 MiB) +
l1i$ description8-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +