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Difference between revisions of "amd/athlon mp/amsn2600dut4c"
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{{amd title|Athlon MP 2600+}}
 
{{amd title|Athlon MP 2600+}}
−
{{mpu
+
{{chip
 
| name                = AMD Athlon MP 2600+
 
| name                = AMD Athlon MP 2600+
 
| no image            = yes
 
| no image            = yes
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| max memory          = 4 GiB
 
| max memory          = 4 GiB
  
−
| electrical          = Yes
+
 
 
| v core              = 1.6 V
 
| v core              = 1.6 V
 
| v core tolerance    =  
 
| v core tolerance    =  
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| tstorage max        = 100 °C
 
| tstorage max        = 100 °C
  
−
| packaging          = Yes
+
|package module 1={{packages/amd/pga-453}}
−
| package 0          = OPGA-453
 
−
| package 0 type      = OPGA
 
−
| package 0 pins      = 453
 
−
| package 0 pitch    = 1.27 mm
 
−
| package 0 width    = 49.53 mm
 
−
| package 0 length    = 49.53 mm
 
−
| package 0 height    = 1.942
 
−
| socket 0            = Socket A
 
−
| socket 0 type      = PGA-462
 
 
}}
 
}}
 
'''Athlon MP 2600+'''' (OPN ''AMSN2600DUT4C'') based on the last-generation {{amd|Barton|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in early [[2003]] for the server and workstation market. This MPU, which operated at 2 GHz with a FSB transfer rate of 266 MT/s (x15 multiplier), was manufactured on a newer [[130 nm process]].
 
'''Athlon MP 2600+'''' (OPN ''AMSN2600DUT4C'') based on the last-generation {{amd|Barton|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in early [[2003]] for the server and workstation market. This MPU, which operated at 2 GHz with a FSB transfer rate of 266 MT/s (x15 multiplier), was manufactured on a newer [[130 nm process]].
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== Cache ==
 
== Cache ==
 
{{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
 
{{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
−
{{cache info
+
{{cache size
 +
|l1 cache=128 KiB
 
|l1i cache=64 KiB
 
|l1i cache=64 KiB
 
|l1i break=1x64 KiB
 
|l1i break=1x64 KiB
 
|l1i desc=2-way set associative
 
|l1i desc=2-way set associative
−
|l1i extra=
+
|l1i policy=
 
|l1d cache=64 KiB
 
|l1d cache=64 KiB
 
|l1d break=1x64 KiB
 
|l1d break=1x64 KiB
 
|l1d desc=2-way set associative
 
|l1d desc=2-way set associative
−
|l1d extra=
+
|l1d policy=
 
|l2 cache=512 KiB
 
|l2 cache=512 KiB
 
|l2 break=1x512 KiB
 
|l2 break=1x512 KiB
 
|l2 desc=16-way set associative
 
|l2 desc=16-way set associative
−
|l2 extra=
+
|l2 policy=
−
|l3 cache=
 
−
|l3 break=
 
−
|l3 desc=
 
−
|l3 extra=
 
 
}}
 
}}
  
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|avx=No
 
|avx=No
 
|avx2=No
 
|avx2=No
−
|avx512=No
+
 
 
|abm=No
 
|abm=No
 
|tbm=No
 
|tbm=No

Latest revision as of 14:20, 13 December 2017

Edit Values
AMD Athlon MP 2600+
General Info
DesignerAMD
ManufacturerAMD
Model NumberAthlon MP 2600+
Part NumberAMSN2600DUT4C
MarketServer
IntroductionMay 6, 2003 (announced)
May 6, 2003 (launched)
ShopAmazon
General Specs
FamilyAthlon MP
LockedYes
Frequency2,000 MHz
Bus typeFSB
Bus speed133 MHz
Bus rate266 MT/s
Clock multiplier15
CPUID6A0
Microarchitecture
MicroarchitectureK7
PlatformAthlon MP
ChipsetAMD-760MP
Core NameBarton
Core Family6
Core Model10
Core Stepping0, 1
Process130 nm
Transistors54,300,000
TechnologyCMOS
Die101 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP2-Way (Multiprocessor)
Electrical
Vcore1.6 V
TDP60 W
TDP (Typical)47.2 W
Tjunction0 °C – 90 °C
Tcase0 °C – 90 °C
Tstorage-40 °C – 100 °C
Packaging
PackageOPGA-453 (PGA)
Dimension49.53 mm x 49.53 mm x 1.942 mm
Pitch1.27 mm
Pins453
InterconnectSocket A (PGA-462)

Athlon MP 2600+' (OPN AMSN2600DUT4C) based on the last-generation Barton core was a 32-bit x86 multiprocessor developed by AMD and introduced in early 2003 for the server and workstation market. This MPU, which operated at 2 GHz with a FSB transfer rate of 266 MT/s (x15 multiplier), was manufactured on a newer 130 nm process.

Cache[edit]

Main article: K7 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
1x64 KiB2-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
1x64 KiB2-way set associative 
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  1x512 KiB16-way set associative 

Graphics[edit]

This MPU has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
SSEStreaming SIMD Extensions
x86-1616-bit x86
x86-3232-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
SmartMPSmartMP Technology
  • Advanced Configuration and Power Interface
    • Halt State
    • Stop Grant State

Documents[edit]

Datasheets[edit]

Others[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/athlon_mp/amsn2600dut4c&oldid=69453"
Facts about "Athlon MP 2600+ - AMD"
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Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Athlon MP 2600+ - AMD#package +
base frequency2,000 MHz (2 GHz, 2,000,000 kHz) +
bus rate266 MT/s (0.266 GT/s, 266,000 kT/s) +
bus speed133 MHz (0.133 GHz, 133,000 kHz) +
bus typeFSB +
chipsetAMD-760MP +
clock multiplier15 +
core count1 +
core family6 +
core model10 +
core nameBarton +
core stepping0 + and 1 +
core voltage1.6 V (16 dV, 160 cV, 1,600 mV) +
cpuid6A0 +
designerAMD +
die area101 mm² (0.157 in², 1.01 cm², 101,000,000 µm²) +
familyAthlon MP +
first announcedMay 6, 2003 +
first launchedMay 6, 2003 +
full page nameamd/athlon mp/amsn2600dut4c +
has amd smartmp technologytrue +
has featureSmartMP Technology +, ACPI +, Halt State + and Stop Grant State +
has locked clock multipliertrue +
has multiprocessing supporttrue +
instance ofmicroprocessor +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
ldateMay 6, 2003 +
manufacturerAMD +
market segmentServer +
max case temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max cpu count2 +
max junction temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitectureK7 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberAthlon MP 2600+ +
nameAMD Athlon MP 2600+ +
packageOPGA-453 +
part numberAMSN2600DUT4C +
platformAthlon MP +
process130 nm (0.13 μm, 1.3e-4 mm) +
smp max ways2 +
tdp60 W (60,000 mW, 0.0805 hp, 0.06 kW) +
tdp (typical)47.2 W (47,200 mW, 0.0633 hp, 0.0472 kW) +
technologyCMOS +
thread count1 +
transistor count54,300,000 +
word size32 bit (4 octets, 8 nibbles) +