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Difference between revisions of "intel/celeron/n3050"
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(Added 1) Secure Boot; and 2) Model using ASUS TP200SA)
 
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{{intel title|Celeron N3050}}
 
{{intel title|Celeron N3050}}
−
{{mpu
+
{{chip
−
| name               = Intel Celeron N3050
+
|name=Intel Celeron N3050
−
| no image           = Yes
+
|no image=Yes
−
| designer           = Intel
+
|designer=Intel
−
| manufacturer       = Intel
+
|manufacturer=Intel
−
| model number       = N3050
+
|model number=N3050
−
| part number         = FH8066501715914
+
|part number=FH8066501715914
−
| part number 1      = FH8066501715925
+
|part number 2=FH8066501715925
−
| part number 2      =  
+
|s-spec=SR29H
−
| part number 3      =  
+
|s-spec 2=SR2A9
−
| market             = Mobile
+
|market=Mobile
−
| first announced     = March, 2015
+
|first announced=March, 2015
−
| first launched     = March, 2015
+
|first launched=March, 2015
−
| last order         =  
+
|last order=June 8, 2018
−
| last shipment       =  
+
|last shipment=December 7, 2018
−
 
+
|release price=$107.00
−
| family             = Celeron
+
|family=Celeron
−
| series             = N3000
+
|series=N3000
−
| locked             = Yes
+
|locked=Yes
−
| frequency           = 1600 MHz
+
|frequency=1600 MHz
−
| turbo frequency    = Yes
+
|turbo frequency1=2160 MHz
−
| turbo frequency1    = 2160 MHz
+
|turbo frequency=Yes
−
| bus type           = IDI
+
|bus type=IDI
−
| bus speed          =
+
|isa=x86-64
−
| clock multiplier    =
+
|isa family=x86
−
| s-spec              = SR29H
+
|microarch=Airmont
−
| s-spec 2            = SR2A9
+
|core name=Braswell
−
| s-spec es          =
+
|core stepping=C0
−
| s-spec qs          =  
+
|process=14 nm
−
| cpuid              =
+
|technology=CMOS
−
 
+
|word size=64 bit
−
| microarch           = Airmont
+
|core count=2
−
| platform            =
+
|thread count=2
−
| core name           = Braswell
+
|max cpus=1
−
| core stepping       = C0
+
|max memory=8 GiB
−
| process             = 14 nm
+
|sdp=4 W
−
| transistors        =
+
|tdp=6 W
−
| technology         = CMOS
+
|temp min=0 °C
−
| die size            =
+
|temp max=90 °C
−
| word size           = 64 bit
+
|packaging=Yes
−
| core count         = 2
+
|package=FCBGA1170
−
| thread count       = 2
+
|package type=FCBGA
−
| max cpus           = 1
+
|package size=25mm x 27mm x 1mm
−
| max memory         = 8 GB
+
|socket=BGA1170
−
 
+
|socket type=BGA
−
| electrical          = Yes
 
−
| sdp                 = 4 W
 
−
| tdp                 = 6 W
 
−
| temp max            = 90 °C
 
−
| temp min            = 0 °C
 
−
 
 
−
| packaging           = Yes
 
−
| package             = FCBGA1170
 
−
| package type       = FCBGA
 
−
| package size       = 25mm x 27mm x 1mm
 
−
| socket             = BGA1170
 
−
| socket type         = BGA
 
 
}}
 
}}
 
The '''{{intel|Celeron}} N3050''' is a {{arch|64}} dual-core [[system on a chip]] designed by Intel and introduced in early 2015. The N3050 is manufactured in [[14 nm process]] based on the {{intel|Airmont}} microarchitecture. This chip operates at 1.6 GHz with turbo mode of up to 2.16 GHz. This SoC incorporates the {{intel|HD Graphics (Braswell)}} GPU which has 12 execution units and operates at 320 MHz with 600 MHz busts.
 
The '''{{intel|Celeron}} N3050''' is a {{arch|64}} dual-core [[system on a chip]] designed by Intel and introduced in early 2015. The N3050 is manufactured in [[14 nm process]] based on the {{intel|Airmont}} microarchitecture. This chip operates at 1.6 GHz with turbo mode of up to 2.16 GHz. This SoC incorporates the {{intel|HD Graphics (Braswell)}} GPU which has 12 execution units and operates at 320 MHz with 600 MHz busts.
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| frequency          = 320 MHz
 
| frequency          = 320 MHz
 
| max frequency      = 600 MHz
 
| max frequency      = 600 MHz
−
| max memory          = 8 GB
+
| max memory          = 8 GiB
 
| output edp          = Yes
 
| output edp          = Yes
 
| output dp          = Yes
 
| output dp          = Yes
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== Expansions ==
 
== Expansions ==
−
{{mpu expansions
+
{{expansions
 
| pcie revision      = 2.0
 
| pcie revision      = 2.0
 
| pcie lanes        = 4
 
| pcie lanes        = 4
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== Features ==
 
== Features ==
−
{{mpu features
+
{{x86 features
 
| em64t    = Yes
 
| em64t    = Yes
 
| nx        = Yes
 
| nx        = Yes
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| sgx      =  
 
| sgx      =  
 
| eist      = Yes
 
| eist      = Yes
 +
| Secure Boot = Yes
 
}}
 
}}
  
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* SDIO Interface: v3.0
 
* SDIO Interface: v3.0
 
* eMMC Interface: v4.5.1
 
* eMMC Interface: v4.5.1
 +
 +
== Utilizing Devices ==
 +
* [[used by:: ASUSPRO P2520SA]]
 +
* [[used by:: ASUS EeeBook E202SA]]
 +
* [[used by:: Acer Aspire ES1-531]]
 +
* [[used by:: ASUS TP200SA DH04T 11.6" transformer book]]
 +
{{expand list}}

Latest revision as of 08:40, 8 July 2022

Edit Values
Intel Celeron N3050
General Info
DesignerIntel
ManufacturerIntel
Model NumberN3050
Part NumberFH8066501715914,
FH8066501715925
S-SpecSR29H, SR2A9
MarketMobile
IntroductionMarch, 2015 (announced)
March, 2015 (launched)
End-of-lifeJune 8, 2018 (last order)
December 7, 2018 (last shipment)
Release Price$107.00
ShopAmazon
General Specs
FamilyCeleron
SeriesN3000
LockedYes
Frequency1600 MHz
Turbo FrequencyYes
Turbo Frequency2160 MHz (1 core)
Bus typeIDI
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureAirmont
Core NameBraswell
Core SteppingC0
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores2
Threads2
Max Memory8 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
SDP4 W
TDP6 W
OP Temperature0 °C – 90 °C

The Celeron N3050 is a 64-bit dual-core system on a chip designed by Intel and introduced in early 2015. The N3050 is manufactured in 14 nm process based on the Airmont microarchitecture. This chip operates at 1.6 GHz with turbo mode of up to 2.16 GHz. This SoC incorporates the HD Graphics (Braswell) GPU which has 12 execution units and operates at 320 MHz with 600 MHz busts.

Cache[edit]

Main article: Airmont § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
2x32 KiB 8-way set associative (per core)
L1D$ 48 KiB
49,152 B
0.0469 MiB
2x24 KiB 6-way set associative (per core)
L2$ 1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
1x1 MiB 16-way set associative (per 2 cores)
L3$ 0 KiB
0 MiB
0 B
0 GiB
No L3$

Memory controller[edit]

Integrated Memory Controller
Type DDR3L-1600
Controllers 1
Channels 2
ECC Support No
Bandwidth (single) 12,800 MB/s
Bandwidth (dual) 25,600 MB/s
Max memory 8,192 MB

Graphics[edit]

Integrated Graphic Information
GPU HD Graphics (Braswell)
Execution Units 12
Displays 3
Frequency 320 MHz
0.32 GHz
320,000 KHz
Max frequency 600 MHz
0.6 GHz
600,000 KHz
Max memory 8 GiB
8,192 MiB
8,388,608 KiB
8,589,934,592 B
Output DisplayPort, Embedded DisplayPort, HDMI
DirectX 11.1
OpenGL 4.2
OpenCL 1.2
DVI 1.4b
HDMI 1.4b
DVI 1.4b
DP 1.1a
eDP 1.4
Max HDMI Res 3840x2160 @30 Hz, 2560x1600 @60 Hz
Max DVI Res 3840x2160 @30 Hz, 2560x1600 @60 Hz
Max DP Res 3840x2160 @30 Hz, 2560x1600 @60 Hz
Max eDP Res 2560x1440 @60 Hz
  • Video decode hardware acceleration including support for H.263, MPEG4, H.264, H.265 (HEVC), VP8, VP9, MVC, MPEG2, VC1, JPEG.
  • Video encode hardware acceleration including support for H.264, H.263, VP8, MVC, JPEG.

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision2.0
Max Lanes4
Configs1x4, 1x2 + 2x1, 4x1
  • USB:
    • USB 3.0: 4 Super Speed (SS) Ports @ 5 Gb/s
    • USB 2.0: 1 High Speed (HS) + 4 Multiplexed with SS Ports @ 5 Gb/s
    • USB HSIC: 2 High Speed Ports @ 480 Mb/s

Features[edit]

Storage[edit]

  • SD Card Interface: v3.0
  • SDIO Interface: v3.0
  • eMMC Interface: v4.5.1

Utilizing Devices[edit]

  • ASUSPRO P2520SA
  • ASUS EeeBook E202SA
  • Acer Aspire ES1-531
  • ASUS TP200SA DH04T 11.6" transformer book

This list is incomplete; you can help by expanding it.

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/celeron/n3050&oldid=100306"
Facts about "Celeron N3050 - Intel"
RDF feed
has featureintegrated gpu +
integrated gpuHD Graphics (Braswell) +
integrated gpu base frequency320 MHz (0.32 GHz, 320,000 KHz) +
integrated gpu max frequency600 MHz (0.6 GHz, 600,000 KHz) +
l1d$ description6-way set associative +
l1d$ size48 KiB (49,152 B, 0.0469 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ descriptionNo L3$ +
l3$ size0 MiB (0 KiB, 0 B, 0 GiB) +