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Difference between revisions of "intel/atom x7/x7-e3950"
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{{intel title|Atom x7-E3950}}
 
{{intel title|Atom x7-E3950}}
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{{mpu
+
{{chip
 
| name                = Intel Atom x7-E3950
 
| name                = Intel Atom x7-E3950
 
| no image            =  
 
| no image            =  
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| image size          =  
 
| image size          =  
 
| caption            =  
 
| caption            =  
 +
| designer            = Intel
 
| manufacturer        = Intel
 
| manufacturer        = Intel
 
| model number        = x7-E3950
 
| model number        = x7-E3950
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| thread count        = 4
 
| thread count        = 4
 
| max cpus            = 1
 
| max cpus            = 1
−
| max memory          =  
+
| max memory          = 8 GiB
 
| max memory addr    =  
 
| max memory addr    =  
  
−
| electrical          = Yes
+
 
 
| power              =  
 
| power              =  
−
| sdp                = 12 W
+
| sdp                =  
−
| tdp                =  
+
| tdp                = 12 W
 
| ctdp down          =  
 
| ctdp down          =  
 
| ctdp down frequency =
 
| ctdp down frequency =
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| socket 0 type      = BGA
 
| socket 0 type      = BGA
 
}}
 
}}
−
The '''Atom x7-E3950''' is a {{arch|64}} quad-core microprocessor set to be introduced by [[Intel]] in early 2017. This ultra-low power MPU, which was specifically designed for the [[internet of things|IoTs]], operates at 1.6 GHz and has a TDP of 12 W. This chip is based on the {{intel|Goldmont|l=arch}}, manufactured on Intel's enhanced [[14 nm process]].
+
The '''Atom x7-E3950''' is a {{arch|64}} [[quad-core]] [[x86]] system on a chip set to be introduced by [[Intel]] in early 2017. This ultra-low power MPU, which was specifically designed for the [[internet of things|IoTs]], operates at 1.6 GHz and has a TDP of 12 W. This chip is based on the {{intel|Goldmont|l=arch}}, manufactured on Intel's enhanced [[14 nm process]].
−
 
 
  
−
{{unknown features}}
 
 
== Cache ==
 
== Cache ==
 
{{main|intel/microarchitectures/goldmont#Memory_Hierarchy|l1=Goldmont § Cache}}
 
{{main|intel/microarchitectures/goldmont#Memory_Hierarchy|l1=Goldmont § Cache}}
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== Memory controller ==
 
== Memory controller ==
 
{{integrated memory controller
 
{{integrated memory controller
−
| type              = LPDDR3-1333
+
| type              = DDR3L-1866
−
| type 2             = LPDDR3-1600
+
| type 2            = LPDDR4-2400
−
| type 3            = LPDDR3-2400
 
−
| type 4            = DDR3L-1333
 
−
| type 5            = DDR3L-1600
 
−
| type 6            = DDR3L-1867
 
−
| type 7            = LPDDR4-1600
 
−
| type 8            = LPDDR4-2133
 
−
| type 9             = LPDDR4-2400
 
 
| controllers        = 1
 
| controllers        = 1
−
| channels          = 2
+
| channels          = 4
 
| ecc support        = Yes
 
| ecc support        = Yes
−
| bandwidth schan    = 19,200 MB/s
+
| max bandwidth      = 35.76 GiB/s
−
| bandwidth dchan    = 38,400 MB/s
+
| bandwidth schan    = 17.88 GiB/s
−
| max memory        = 8,192 MB
+
| bandwidth dchan    = 35.76 GiB/s
 +
| max memory        = 8 GiB
 +
| pae                = 40 bit
 
}}
 
}}
  
 
== Graphics ==
 
== Graphics ==
 
{{integrated graphic
 
{{integrated graphic
−
| gpu                = HD Graphics ??
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| gpu                = HD Graphics 505
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| device id          = ?
+
| device id          = 0x5A84
−
| execution units    = 12
+
| execution units    = 18
 
| displays            = 3
 
| displays            = 3
−
| frequency          = ? MHz
+
| frequency          = 500 MHz
−
| max frequency      = ? MHz
+
| max frequency      = 650 MHz
−
| max memory          = 8 GB
+
| max memory          = 2 GiB
  
 
| output crt          =  
 
| output crt          =  
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| max res vga freq    =
 
| max res vga freq    =
  
−
| intel quick sync  =  
+
| intel quick sync  = Yes
 
| intel intru 3d    =  
 
| intel intru 3d    =  
 
| intel insider      =  
 
| intel insider      =  
 
| intel widi        =  
 
| intel widi        =  
 
| intel fdi          =  
 
| intel fdi          =  
−
| intel clear video  =  
+
| intel clear video  = Yes
 
}}
 
}}
  
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== Expansions ==
 
== Expansions ==
−
{{mpu expansions
+
{{expansions
 
| pcie revision      = 2.0
 
| pcie revision      = 2.0
 
| pcie lanes        = 4
 
| pcie lanes        = 4
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== Features ==  
 
== Features ==  
−
{{mpu features
+
{{x86 features
 
| em64t      = Yes
 
| em64t      = Yes
 
| nx          = Yes
 
| nx          = Yes
−
| txt        = Yes
+
| txt        =  
 
| tsx        =  
 
| tsx        =  
 
| vpro        =  
 
| vpro        =  
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| os guard    =  
 
| os guard    =  
 
| intel at    =  
 
| intel at    =  
 +
| intel ipt  = Yes
 
}}
 
}}
  
 
== Die Shot ==
 
== Die Shot ==
−
Intel {{intel|Atom}} E3900 SoC series die shot:
+
Intel {{intel|Goldmont|l=arch}}-based {{intel|Atom}} E3900 SoC series die shot:
 
:[[File:atom e3900 die shot.jpg|650px]]
 
:[[File:atom e3900 die shot.jpg|650px]]
  
 
== Documents ==
 
== Documents ==
 
* [[:File:atom-e3900-fact-sheet.pdf|Intel Atom Processor E3900 Series Fact Sheet]]
 
* [[:File:atom-e3900-fact-sheet.pdf|Intel Atom Processor E3900 Series Fact Sheet]]

Latest revision as of 15:15, 13 December 2017

Edit Values
Intel Atom x7-E3950
Atom E3900 SoC Front.png
General Info
DesignerIntel
ManufacturerIntel
Model Numberx7-E3950
MarketEmbedded
IntroductionOctober 26, 2016 (announced)
2017 (launched)
ShopAmazon
General Specs
FamilyAtom x7
SeriesE3900
LockedYes
Frequency1600 MHz
Turbo FrequencyYes
Turbo Frequency2000 MHz (1 core)
Microarchitecture
MicroarchitectureGoldmont
PlatformApollo Lake
Core NameApollo Lake
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores4
Threads4
Max Memory8 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP12 W
Tjunction-40 °C – 110 °C

The Atom x7-E3950 is a 64-bit quad-core x86 system on a chip set to be introduced by Intel in early 2017. This ultra-low power MPU, which was specifically designed for the IoTs, operates at 1.6 GHz and has a TDP of 12 W. This chip is based on the Goldmont, manufactured on Intel's enhanced 14 nm process.

Cache[edit]

Main article: Goldmont § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
2x32 KiB 8-way set associative (per core)
L1D$ 48 KiB
49,152 B
0.0469 MiB
2x24 KiB 6-way set associative (per core)
L2$ 2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
2x1 MiB 16-way set associative (per 2 cores)
L3$ 0 KiB
0 MiB
0 B
0 GiB
No L3$

Memory controller[edit]

Integrated Memory Controller
Type DDR3L-1866, LPDDR4-2400
Controllers 1
Channels 4
ECC Support Yes
Max bandwidth 35.76 GiB/s
Bandwidth (single) 17.88 GiB/s
Bandwidth (dual) 35.76 GiB/s
Max memory 8 GiB
Physical Address Extensions 40 bit

Graphics[edit]

Integrated Graphic Information
GPU HD Graphics 505
Device ID 0x5A84
Execution Units 18
Displays 3
Frequency 500 MHz
0.5 GHz
500,000 KHz
Max frequency 650 MHz
0.65 GHz
650,000 KHz
Max memory 2 GiB
2,048 MiB
2,097,152 KiB
2,147,483,648 B
Output DisplayPort, Embedded DisplayPort, HDMI, DSI
DirectX 12
OpenGL 4.3
OpenCL 1.2
OpenGL ES 3.0
HDMI 1.4b
DP 1.2
eDP 1.3
Max HDMI Res 3840x2160 @30 Hz
Max DSI Res 2560x1600 @60 Hz
Max DP Res 4096x2160 @60 Hz
Max eDP Res 3840x2160 @60 Hz
Intel Quick Sync Video
Intel Clear Video
  • Video decode hardware acceleration including support for HEVC (H.265), H.264, MVC, VP8, VP9, MPEG2, VC-1, WMV9, JPEG/MJPEG.
  • Video encode hardware acceleration including support for HEVC (H.265), H.264, MVC, VP8, VP9, JPEG/MJPEG.

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision2.0
Max Lanes4
Configs4x1, 2x1 + 1x2 + 1x2
USB
Revision2.0, 3.0
Ports6
UART
SATA
Revision3.0
GP I/OYes


Features[edit]

Die Shot[edit]

Intel Goldmont-based Atom E3900 SoC series die shot:

atom e3900 die shot.jpg

Documents[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/atom_x7/x7-e3950&oldid=70430"
Facts about "Atom x7-E3950 - Intel"
RDF feed
device id? +
has featureintegrated gpu +
integrated gpuHD Graphics ?? +
l1d$ description6-way set associative +
l1d$ size48 KiB (49,152 B, 0.0469 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ descriptionNo L3$ +
l3$ size0 MiB (0 KiB, 0 B, 0 GiB) +