From WikiChip
Difference between revisions of "intel/core i7ee/i7-6950x"
CHA0SHACKER (talk | contribs) |
|||
(19 intermediate revisions by 7 users not shown) | |||
Line 1: | Line 1: | ||
{{intel title|Core i7-6950X Extreme Edition}} | {{intel title|Core i7-6950X Extreme Edition}} | ||
− | {{ | + | {{chip |
− | | name | + | |name=Core i7-6950X Extreme Edition |
− | | no image | + | |no image=Yes |
− | | | + | |designer=Intel |
− | + | |manufacturer=Intel | |
− | + | |model number=i7-6950X | |
− | | manufacturer | + | |part number=BX80671I76950X |
− | | model number | + | |part number 2=BXC80671I76950X |
− | | part number | + | |part number 3=CM8067102055800 |
− | | part number | + | |s-spec=SR2PA |
− | | part number | + | |market=Desktop |
− | | | + | |first launched=May 31, 2016 |
− | | | + | |release price=$1743.00 |
− | | first launched | + | |family=Core i7EE |
− | | | + | |series=i7-6900 |
− | + | |locked=No | |
− | + | |frequency=3000 MHz | |
− | | family | + | |turbo frequency1=4000 MHz |
− | | series | + | |turbo frequency2=3500 MHz |
− | | locked | + | |turbo frequency3=3400MHz |
− | | frequency | + | |turbo frequency4=3400MHz |
− | + | |turbo frequency5=3400MHz | |
− | | turbo frequency1 | + | |turbo frequency6=3400MHz |
− | | turbo frequency2 | + | |turbo frequency7=3400MHz |
− | | turbo frequency3 | + | |turbo frequency8=3400MHz |
− | | turbo frequency4 | + | |turbo frequency9=3400MHz |
− | | turbo frequency5 | + | |turbo frequency10=3400MHz |
− | | turbo frequency6 | + | |bus type=DMI 2.0 |
− | | turbo frequency7 | + | |bus speed=5 GT/s |
− | | turbo frequency8 | + | |clock multiplier=30 |
− | | turbo frequency9 | + | |cpuid=406F1 |
− | | turbo frequency10 | + | |isa=x86-64 |
− | | bus type | + | |isa family=x86 |
− | | bus speed | + | |microarch=Broadwell |
− | + | |chipset=Wellsburg | |
− | | clock multiplier | + | |core name=Broadwell E |
− | | | + | |core stepping=M0 |
− | | | + | |process=14 nm |
− | | | + | |transistors=3,400,000,000 |
− | + | |technology=CMOS | |
− | | microarch | + | |die area=246 mm² |
− | + | |word size=64 bit | |
− | | chipset | + | |core count=10 |
− | | core name | + | |thread count=20 |
− | | core stepping | + | |max cpus=1 |
− | | process | + | |max memory=128 GiB |
− | | transistors | + | |tdp=140 W |
− | | technology | + | |tjunc min=0 |
− | | die | + | |tjunc max=96 °C |
− | | word size | + | |packaging=Yes |
− | | core count | + | |package=FCLGA-2011 v3 |
− | | thread count | + | |package type=FCLGA |
− | | max cpus | + | |package size=52.5mm x 45.0mm |
− | | max memory | + | |socket=LGA-2011 v3 |
− | + | |socket type=LGA | |
− | |||
− | | tdp | ||
− | | | ||
− | | | ||
− | |||
− | | packaging | ||
− | | package | ||
− | | package type | ||
− | |||
− | | package size | ||
− | | socket | ||
− | | socket type | ||
}} | }} | ||
The '''Core i7-6950X {{intel|Core i7EE|Extreme Edition}}''' is a {{arch|64}} deca-core top-of-the-line [[MPU]] introduced by [[Intel]] for the enthusiasts market in mid-2016. The i7-6950X replaced the {{\\|i7-5960X}} as Intel's flagship microprocessor based on {{intel|Broadwell}} microarchitecture - also becoming the first consumer-class deca-core microprocessor. | The '''Core i7-6950X {{intel|Core i7EE|Extreme Edition}}''' is a {{arch|64}} deca-core top-of-the-line [[MPU]] introduced by [[Intel]] for the enthusiasts market in mid-2016. The i7-6950X replaced the {{\\|i7-5960X}} as Intel's flagship microprocessor based on {{intel|Broadwell}} microarchitecture - also becoming the first consumer-class deca-core microprocessor. | ||
Line 73: | Line 61: | ||
{{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell § Cache}} | {{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell § Cache}} | ||
{{cache info | {{cache info | ||
− | |l1i cache=320 | + | |l1i cache=320 KiB |
− | |l1i break=10x32 | + | |l1i break=10x32 KiB |
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
|l1i extra=(per core) | |l1i extra=(per core) | ||
− | |l1d cache=320 | + | |l1d cache=320 KiB |
− | |l1d break=10x32 | + | |l1d break=10x32 KiB |
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
|l1d extra=(per core) | |l1d extra=(per core) | ||
− | |l2 cache=2. | + | |l2 cache=2.5 MiB |
− | |l2 break=10x256 | + | |l2 break=10x256 KiB |
|l2 desc=8-way set associative | |l2 desc=8-way set associative | ||
|l2 extra=(per core) | |l2 extra=(per core) | ||
− | |l3 cache=25 | + | |l3 cache=25 MiB |
− | |l3 break=10x2.5 | + | |l3 break=10x2.5 MiB |
|l3 desc=20-way set associative | |l3 desc=20-way set associative | ||
|l3 extra=(shared) | |l3 extra=(shared) | ||
Line 105: | Line 93: | ||
| bandwidth dchan = 38,400 MB/s | | bandwidth dchan = 38,400 MB/s | ||
| bandwidth qchan = 76,800 MB/s | | bandwidth qchan = 76,800 MB/s | ||
− | | max memory = 128 | + | | max memory = 128 GiB |
}} | }} | ||
== Expansions == | == Expansions == | ||
− | {{ | + | {{expansions |
| pcie revision = 3.0 | | pcie revision = 3.0 | ||
| pcie lanes = 40 | | pcie lanes = 40 | ||
Line 127: | Line 115: | ||
== Features == | == Features == | ||
− | {{ | + | {{x86 features |
| em64t = Yes | | em64t = Yes | ||
| nx = Yes | | nx = Yes | ||
Line 162: | Line 150: | ||
| os guard = | | os guard = | ||
}} | }} | ||
+ | |||
+ | == Frequencies == | ||
+ | {{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}} | ||
+ | {{frequency table | ||
+ | |freq_base=3,000 MHz | ||
+ | |freq_1=4,000 MHz | ||
+ | |freq_2=3,500 MHz | ||
+ | |freq_3=3,400 MHz | ||
+ | |freq_4=3,400 MHz | ||
+ | |freq_5=3,400 MHz | ||
+ | |freq_6=3,400 MHz | ||
+ | |freq_7=3,400 MHz | ||
+ | |freq_8=3,400 MHz | ||
+ | |freq_9=3,400 MHz | ||
+ | |freq_10=3,400 MHz | ||
+ | |freq_avx2_1=3,400 MHz | ||
+ | |freq_avx2_2=3,400 MHz | ||
+ | |freq_avx2_3=3,200 MHz | ||
+ | |freq_avx2_4=3,100 MHz | ||
+ | |freq_avx2_5=3,100 MHz | ||
+ | |freq_avx2_6=3,100 MHz | ||
+ | |freq_avx2_7=3,100 MHz | ||
+ | |freq_avx2_8=3,100 MHz | ||
+ | |freq_avx2_9=3,100 MHz | ||
+ | |freq_avx2_10=3,100 MHz | ||
+ | }} | ||
+ | |||
+ | == Die Shot == | ||
+ | * 3,400,000,000 transistors | ||
+ | * 246 mm<sup>2</sup> | ||
+ | |||
+ | :[[File:broadwell (deca-core) die shot.png|650px]] | ||
+ | |||
+ | |||
+ | :[[File:broadwell (deca-core) die shot (annotated).png|650px]] | ||
== Documents == | == Documents == |
Latest revision as of 14:29, 24 March 2019
Edit Values | |
Core i7-6950X Extreme Edition | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | i7-6950X |
Part Number | BX80671I76950X, BXC80671I76950X, CM8067102055800 |
S-Spec | SR2PA |
Market | Desktop |
Introduction | May 31, 2016 (launched) |
Release Price | $1743.00 |
Shop | Amazon |
General Specs | |
Family | Core i7EE |
Series | i7-6900 |
Locked | No |
Frequency | 3000 MHz |
Turbo Frequency | 4000 MHz (1 core), 3500 MHz (2 cores), 3400MHz (3 cores), 3400MHz (4 cores), 3400MHz (5 cores), 3400MHz (6 cores), 3400MHz (7 cores), 3400MHz (8 cores), 3400MHz (9 cores), 3400MHz (10 cores) |
Bus type | DMI 2.0 |
Bus speed | 5 GT/s |
Clock multiplier | 30 |
CPUID | 406F1 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Broadwell |
Chipset | Wellsburg |
Core Name | Broadwell E |
Core Stepping | M0 |
Process | 14 nm |
Transistors | 3,400,000,000 |
Technology | CMOS |
Die | 246 mm² |
Word Size | 64 bit |
Cores | 10 |
Threads | 20 |
Max Memory | 128 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 140 W |
Tjunction | 0 – 96 °C |
The Core i7-6950X Extreme Edition is a 64-bit deca-core top-of-the-line MPU introduced by Intel for the enthusiasts market in mid-2016. The i7-6950X replaced the i7-5960X as Intel's flagship microprocessor based on Broadwell microarchitecture - also becoming the first consumer-class deca-core microprocessor.
Contents
Cache[edit]
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 320 KiB 327,680 B 0.313 MiB |
10x32 KiB 8-way set associative (per core) |
L1D$ | 320 KiB 327,680 B 0.313 MiB |
10x32 KiB 8-way set associative (per core) |
L2$ | 2.5 MiB 2,560 KiB 2,621,440 B 0.00244 GiB |
10x256 KiB 8-way set associative (per core) |
L3$ | 25 MiB 25,600 KiB 26,214,400 B 0.0244 GiB |
10x2.5 MiB 20-way set associative (shared) |
Graphics[edit]
This processor has no integrated graphics processing unit.
Memory controller[edit]
Integrated Memory Controller | |
Type | DDR4-2133, DDR4-2400 |
Controllers | 1 |
Channels | 4 |
ECC Support | No |
Max bandwidth | 76.8 GB/s |
Bandwidth (single) | 19,200 MB/s |
Bandwidth (dual) | 38,400 MB/s |
Bandwidth (quad) | 76,800 MB/s |
Max memory | 128 GiB |
Expansions[edit]
![]() |
Expansion Options
|
|||||||
|
Features[edit]
[Edit/Modify Supported Features]
![]() |
Supported x86 Extensions & Processor Features
|
|||||||||||||||||||||||||||||||||||
|
Frequencies[edit]
- See also: Intel's CPU Frequency Behavior
Mode | Base | Turbo Frequency/Active Cores | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | ||
Normal | 3,000 MHz | 4,000 MHz | 3,500 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz |
AVX2 | 3,400 MHz | 3,400 MHz | 3,200 MHz | 3,100 MHz | 3,100 MHz | 3,100 MHz | 3,100 MHz | 3,100 MHz | 3,100 MHz | 3,100 MHz |
Die Shot[edit]
- 3,400,000,000 transistors
- 246 mm2
Documents[edit]
See also[edit]
Facts about "Core i7-6950X Extreme Edition - Intel"
l1d$ description | 8-way set associative + |
l1i$ description | 8-way set associative + |
l2$ description | 8-way set associative + |
l3$ description | 20-way set associative + |