User contributions for CHA0SHACKER - WikiChip

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User contributions

For CHA0SHACKER (talk | block log | uploads | logs)

14:03, 24 March 2019 (diff | hist) . . (0)‎ . . m intel/core i7/i7-5775c ‎ (current)
14:02, 24 March 2019 (diff | hist) . . (+174)‎ . . intel/core i7/i7-5775c ‎ (Added frequency table + removed support for DDR3L-1866)
13:36, 24 March 2019 (diff | hist) . . (-662)‎ . . intel/core i7/i7-5775c ‎
13:29, 24 March 2019 (diff | hist) . . (+13)‎ . . intel/core i7ee/i7-6950x ‎ (current)
13:27, 24 March 2019 (diff | hist) . . (-16)‎ . . m intel/core i7ee/i7-6950x ‎ (Changed stepping to M0 as per CPU-Z, moved bus rate to bus speed, added max junction temp)
13:23, 24 March 2019 (diff | hist) . . (+236)‎ . . intel/core i7ee/i7-6950x ‎
13:12, 24 March 2019 (diff | hist) . . (+231)‎ . . intel/core i7ee/i7-6950x ‎ (Added AVX2 turbo table)
13:08, 24 March 2019 (diff | hist) . . (+314)‎ . . intel/core i7ee/i7-6950x ‎ (Changed dual core turbo to 3.5GHz / Added turbo table)
03:05, 21 March 2019 (diff | hist) . . (+49)‎ . . intel/cores/skylake s ‎ (Changed supported instruction sets to match Skylake-DT) (current)
04:54, 15 March 2019 (diff | hist) . . (+1)‎ . . m intel/cores/skylake s ‎ (Added a zero to max clock)
04:46, 15 March 2019 (diff | hist) . . (-4)‎ . . m intel/cores/skylake s ‎ (Changed GT uArch from GEN 9.5 to GEN 9)

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