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Difference between revisions of "intel/atom x3/x3-c3445"
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{{intel title|Atom x3-C3445}} | {{intel title|Atom x3-C3445}} | ||
− | {{ | + | {{chip |
| name = Atom x3-C3445 | | name = Atom x3-C3445 | ||
| no image = Yes | | no image = Yes | ||
| image = | | image = | ||
| caption = | | caption = | ||
− | | manufacturer = | + | | designer = Intel |
+ | | manufacturer = TSMC | ||
| model number = x3-C3445 | | model number = x3-C3445 | ||
| part number = | | part number = | ||
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| s-spec es = | | s-spec es = | ||
− | | microarch = | + | | microarch = Silvermont |
− | | platform = | + | | platform = SoFIA |
− | | core name = | + | | core name = SoFIA |
| core stepping = | | core stepping = | ||
| process = 28 nm | | process = 28 nm | ||
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| thread count = 4 | | thread count = 4 | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = | + | | max memory = 2 GiB |
+ | |||
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| power = | | power = | ||
| sdp = 2 W | | sdp = 2 W | ||
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== Cache == | == Cache == | ||
{{cache info | {{cache info | ||
− | + | |l2 cache=2 MiB | |
− | + | |l2 break=2x1 MiB | |
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− | |l2 cache=2 | ||
− | |l2 break=2x1 | ||
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|l2 extra=(per 2 cores) | |l2 extra=(per 2 cores) | ||
− | |l3 cache=0 | + | |l3 cache=0 KiB |
|l3 desc=No L3$ | |l3 desc=No L3$ | ||
}} | }} | ||
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== Features == | == Features == | ||
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| em64t = Yes | | em64t = Yes | ||
| nx = Yes | | nx = Yes |
Latest revision as of 15:15, 13 December 2017
Edit Values | |
Atom x3-C3445 | |
General Info | |
Designer | Intel |
Manufacturer | TSMC |
Model Number | x3-C3445 |
Market | Mobile |
Introduction | April, 2015 (announced) April, 2015 (launched) |
Shop | Amazon |
General Specs | |
Family | Atom x3 |
Series | C3000 |
Locked | Yes |
Frequency | 1200 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 1400 (1 core) |
Microarchitecture | |
Microarchitecture | Silvermont |
Platform | SoFIA |
Core Name | SoFIA |
Process | 28 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 4 |
Threads | 4 |
Max Memory | 2 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
SDP | 2 W |
OP Temperature | -25 °C – 85 °C |
The x3-C3445 is a quad-core 64-bit system-on-chip designed by Intel and introduced in April 2015. The x3-C3445 is one of Intel's first SoC to integrate a 4G LET 5-mode modem. Operating in 1.2 GHz with a burst frequency of 1.4 GHz, this chip has a scenario designed power of 2 W. This chip is manufactured in 28 nm process and integrates an ARM Mali T720 MP2 GPU.
The x3-C3405 is a WiFi-only identical version of this chip.
Contents
Cache[edit]
Cache Info [Edit Values] | ||
L2$ | 2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB |
2x1 MiB (per 2 cores) |
L3$ | 0 KiB 0 MiB 0 B 0 GiB |
No L3$ |
Graphics[edit]
Integrated Graphic Information | |
GPU | Mali T720 MP2 |
Displays | 1 |
Frequency | 456 MHz 0.456 GHz
456,000 KHz |
Output | DSI |
DirectX | 9.3 |
OpenGL ES | 3.0 |
Max DSI Res | 1280x800 @60 Hz |
Memory controller[edit]
Integrated Memory Controller | |
Type | LPDDR2-1066, LPDDR3-1066 |
Controllers | 1 |
Channels | 1 |
ECC Support | No |
Max bandwidth | 4,200 MB/s |
Max memory | 2,048 MB |
Input/Output[edit]
- USB Revision: 2.0 OTG
- USB Ports: 1
- GP I/O: 5x I2C
- UART: 7x USIF
- GLONASS
Storage[edit]
- eMMC 4.51
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Networking[edit]
- RF Transceiver: SMARTi 4.5s
- Baseband Functions: HLTE FDD/TDD; up to Cat.6 300Mbps 2CA up to 40MHz DC-HSDPA 42Mbps HSUPA 11Mbps TD-SCDMA EDGE
- RF Transceiver Functions: Low power multimode multiband transceiver for LTE-FDD LTE-TDD 3G 2.5G 2G TD-SCDMA
- Wi-Fi: 802.11 B/G/N
- Bluetooth: 4.1 FMR
- GPS / GLONASS / Beidou
- FM Radio
- Protocol Stack: Intel Release 10 Protocol Stack
ISP/Camera[edit]
- Up to 13 MP/5 MP
Facts about "Atom x3-C3445 - Intel"
has feature | integrated gpu + |
integrated gpu | Mali T720 MP2 + |
integrated gpu base frequency | 456 MHz (0.456 GHz, 456,000 KHz) + |
l3$ description | No L3$ + |