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− | <includeonly>{| style="border: solid 1px #e5e5ff; width: 250px; float: right;" | + | <includeonly>{{logic device |
− | | style="text-align: center; background: #ccffcc; font-size: 16px;" | '''{{{title}}}''' | + | |title = {{{title}}} |
− | |- | + | |symbol title = ANSI Symbol |
− | | style="text-align: center; font-size: 16px;" | ANSI Symbol
| + | |symbol body = [[File:{{lc:{{{name}}}}} gate (ansi).svg|150px|center]] |
− | |- | + | |functional body = [[File:{{lc:{{{name}}}}} gate functional.gif|center]] |
− | | [[File:{{lc:{{{name}}}}} gate (ansi).svg|150px|center]]
| + | |truth table = {{truth table/{{lc:{{{name}}}}}}} |
− | |- | + | }}</includeonly><noinclude> |
− | | style="text-align: center; font-size: 16px; padding-top: 10px;" | Functional
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− | |-
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− | | [[File:{{lc:{{{name}}}}} gate functional.gif|center]]
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− | |- | |
− | | style="text-align: center; font-size: 16px; padding-top: 10px;" | Truth Table
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− | |-
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− | |
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− | {{truth table/{{lc:{{{name}}}}}}} | |
− | |-
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− | |
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− | {| class="wikitable mw-collapsible mw-collapsed" style="margin: 0px; width:100%; text-align: center; padding-top: 0px;"
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− | | style="font-size: 0.8em;" | Other Gates
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− | |-
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− | |
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− | {| style="width:100%;"
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− | | [[buffer gate|Buffer]] || [[Tri-state Buffer]] || [[NOT]]
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− | |-
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− | | [[AND]] || [[OR]] || [[XOR]]
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− | |-
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− | | [[NAND]] || [[NOR]] || [[XNOR]]
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− | |-
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− | | [[IMPLY]] || [[NIMPLY]] || [[INH]]
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− | |}
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− | |}
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− | |-
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− | |
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− | {| class="wikitable mw-collapsible mw-collapsed" style="margin: 0px; width:100%; text-align: center;"
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− | | style="font-size: 0.8em;" | Other Components
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− | |-
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− | |
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− | {| style="width:100%;"
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− | ! colspan="3" | Plexers
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− | |-
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− | | [[MUX]] || [[DEMUX]] || [[encoder (circuit)|Encoder]]
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− | |-
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− | | [[decoder (circuit)|Decoder]] || [[priority encoder|Pri-Encoder]]
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− | |-
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− | ! colspan="3" | [[ALU]]
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− | |-
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− | | [[Adder]] || [[Subtractor]] || [[Multiplier]]
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− | |-
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− | | [[Divider]] || [[Shifter]] || [[Rotator]]
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− | |-
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− | | [[Comparator]] || [[Negator]]
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− | |-
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− | ! colspan="3" | Memory
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− | |-
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− | | [[D latch]] || [[D flip-flop]] || [[SR latch]]
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− | |-
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− | | [[JK flip-flop]] || [[T flip-flop]] || [[Register]]
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− | |-
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− | | [[Register file]] || [[SRAM]] || [[Counter]]
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− | |-
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− | | [[ROM]] || [[CAM]] || [[DRAM]]
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− | |-
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− | ! colspan="3" | I/O
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− | |-
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− | | [[Shift register]] || [[SIPO]] || [[PISO]]
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− | |-
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− | | [[ADC]] || [[DAC]]
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− | |}
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− | |}
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− | |}</includeonly><noinclude>
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| {{documentation}} | | {{documentation}} |
| </noinclude> | | </noinclude> |
Latest revision as of 18:09, 24 November 2015
AND Gate
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ANSI Symbol
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Functional
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Truth Table
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Inputs |
Outputs
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A |
B |
Q
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0 |
0 |
0
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0 |
1 |
0
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1 |
0 |
0
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1 |
1 |
1
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{{logic gate
|title = AND Gate
|name = AND
}}