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Difference between revisions of "fairchild/pps-25"
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{{fairchild title|PPS-25}}
 
{{fairchild title|PPS-25}}
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The '''Fairchild PPS-25''' was a [[microprocessor family|family]] of 4-bit multi-chip [[microcontrollers]] developed by [[Fairchild]] in 1972. While there is no definitive starting production date available, some older books state that the chip was first produced in first quarter of 1971, ahead of the [[Intel 4004]].<ref>Jack Belzer, Albert G. Holzman, Allen Kent (Jul 1, 1978). Encyclopedia of Computer Science and Technology: Volume 10 - Linear and Matrix Algebra to Microorganisms: Computer-Assisted Identification. [http://books.google.com/books?id=iBsUXrgKBKkC&lpg=PA401&ots=i6F1IL5YAO&pg=PA401 page 401]</ref>
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{{ic family
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{| class="wikitable" style="float: right;"
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| title            = Fairchild PPS-25
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| image            = <!-- Image representation of the IC family, e.g. "MCS-4.jpg"  -->
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| caption          = <!-- description of the image                                  -->
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| developer        = Fairchild Semiconductor
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| manufacturer      = Fairchild Semiconductor
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| type              = microprocessors
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| production start  = 1971
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| arch              = 4-bit
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| word              = 4 bit
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| proc              = <!-- process, e.g. "8 μm"                                      -->
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| tech              = pMOS
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| clock            = 400 kHz
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| package          = DIP40
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}}
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The '''PPS-25''' (also '''PPS25'''; '''Programmed Processor System - 25 Digits''') was a [[microprocessor family|family]] of [[4-bit architecture|4-bit]] multi-chip [[microprocessor]] developed by [[Fairchild]] and released in 1971/2. The PPS-25 was designed for scientific calculations. While there is no definitive starting production date available, there is evidence pointing to early 1971/2 (some early books placing it ahead of the {{intel|4004}} at the second quarter of 1971). This family was very short-lived as within a few years, Fairchild shifted their effort toward more advanced designs such as their macrologic families {{fairchild|4700}}/{{fairchild|9400}} and what became their flagship product, the {{fairchild|F8}}.
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{{lost chip|about=the Fairchild PPS-25 family}}
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== Overview ==
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The PPS-25, Programmed Processor System - 25 Digits, was a {{arch|4}} microprocessor system intended for scientific calculations. The system was 25-digit (100-bit) seriel, 4-bit parallel operating at 62.5 µs word time and 2.5 µs bit time. That is, the addition of two word (25-digit each) took 62.5 µs with multiplication being 50 ms.
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The system supported up to 26 ROMs, each consisting of 256 micro-instructions.
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==Members==
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{| class="wikitable"
 
! colspan="2" | Family Members
 
! colspan="2" | Family Members
 
|-
 
|-
 
! Part !! Description
 
! Part !! Description
 
|-
 
|-
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| {{fairchild|3805}} || [[ALU]]
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| {{\|3805}} || [[ALU]]
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|-
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| {{\|3806}} || Control and timing unit
 
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|-
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| {{fairchild|3806}} || Control and timing unit
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| {{\|3808}} || Memory
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|-
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| {{\|3810}} || Program ROM
 
|}
 
|}
  
 
==References ==
 
==References ==
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{{reflist}}
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* Jack Belzer, Albert G. Holzman, Allen Kent (Jul 1, 1978). Encyclopedia of Computer Science and Technology: Volume 10 - Linear and Matrix Algebra to Microorganisms: Computer-Assisted Identification. [http://books.google.com/books?id=iBsUXrgKBKkC&lpg=PA401&ots=i6F1IL5YAO&pg=PA401 page 401]
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* Zaks, Rodnay. "Microcomputer systems: A survey." Euromicro Newsletter 1.1 (1974): 9-13.
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{{stub}}
 
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{{DEFAULTSORT:PPS-25, Fairchild}}
 
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[[Category:4-bit microprocessors]]
 
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[[Category:1972 microprocessors]]
 
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[[Category:Fairchild Semiconductor microprocessors]]
 
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[[Category:Microprocessor stubs]]
 

Latest revision as of 22:48, 10 July 2017

Fairchild PPS-25
no photo (ic).svg
Developer Fairchild Semiconductor
Manufacturer Fairchild Semiconductor
Type microprocessors
Production 1971
Architecture 4-bit
Word size 4 bit
0.5 octets
1 nibbles
Technology pMOS
Clock 400 kHz
Package DIP40

The PPS-25 (also PPS25; Programmed Processor System - 25 Digits) was a family of 4-bit multi-chip microprocessor developed by Fairchild and released in 1971/2. The PPS-25 was designed for scientific calculations. While there is no definitive starting production date available, there is evidence pointing to early 1971/2 (some early books placing it ahead of the 4004 at the second quarter of 1971). This family was very short-lived as within a few years, Fairchild shifted their effort toward more advanced designs such as their macrologic families 4700/9400 and what became their flagship product, the F8.


Book icon.png Help! This article is about the Fairchild PPS-25 family that has lost in the mists of time. Please help use restore and preserve this info! If you have more information pertaining to this chip please consider editing this page or posting that info on its discussion page (e.g. datasheet, manuals, catalogs, or any other literature on the subject would be help greatly).

Overview[edit]

The PPS-25, Programmed Processor System - 25 Digits, was a 4-bit microprocessor system intended for scientific calculations. The system was 25-digit (100-bit) seriel, 4-bit parallel operating at 62.5 µs word time and 2.5 µs bit time. That is, the addition of two word (25-digit each) took 62.5 µs with multiplication being 50 ms.

The system supported up to 26 ROMs, each consisting of 256 micro-instructions.

Members[edit]

Family Members
Part Description
3805 ALU
3806 Control and timing unit
3808 Memory
3810 Program ROM

References[edit]

  • Jack Belzer, Albert G. Holzman, Allen Kent (Jul 1, 1978). Encyclopedia of Computer Science and Technology: Volume 10 - Linear and Matrix Algebra to Microorganisms: Computer-Assisted Identification. page 401
  • Zaks, Rodnay. "Microcomputer systems: A survey." Euromicro Newsletter 1.1 (1974): 9-13.
Retrieved from "https://en.wikichip.org/w/index.php?title=fairchild/pps-25&oldid=53760"
Facts about "PPS-25 - Fairchild"
RDF feed
designerFairchild Semiconductor +
full page namefairchild/pps-25 +
instance ofmicroprocessor family +
main designerFairchild Semiconductor +
manufacturerFairchild Semiconductor +
nameFairchild PPS-25 +
packageDIP40 +
technologypMOS +
word size4 bit (0.5 octets, 1 nibbles) +