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Difference between revisions of "nvidia"

(CPU Families)
(Microarchitectures)
 
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== Microarchitectures ==
 
== Microarchitectures ==
{{collist
+
 
| count = 4
 
|
 
 
'''GPUs:'''
 
'''GPUs:'''
 +
{| border="0" cellpadding="2" width="100%"
 +
|-
 +
|width="20%" valign="top" align="left"|
 +
* NV3 (1997)
 +
* NV4 (''{{nvidia|Fahrenheit|l=arch}}'') (1998)
 +
* NV10 (''{{nvidia|Celsius|l=arch}}'') (1999)
 +
* NV20 (''{{nvidia|Kelvin|l=arch}}'') (2001)
 +
* NV30 (''{{nvidia|Rankine|l=arch}}'') (2003)
 +
* NV40 (''{{nvidia|Curie|l=arch}}'') (2004)
 +
|width="23%" valign="top" align="left"|
 
* {{nvidia|Tesla|l=arch}}
 
* {{nvidia|Tesla|l=arch}}
 +
** G80/G92 (1 Gen) (2006)
 +
** G200/GT215 (2 Gen) (2008)
 
* {{nvidia|Fermi|l=arch}}
 
* {{nvidia|Fermi|l=arch}}
 +
** GF100/GF104 (1 Gen) (2010)
 +
** GF110/GF114 (2 Gen) (2010)
 +
|width="23%" valign="top" align="left|
 
* {{nvidia|Kepler|l=arch}}
 
* {{nvidia|Kepler|l=arch}}
 +
** GK104/GK110 (1 Gen) (2012)
 +
** GK208 (2 Gen) (2013)
 
* {{nvidia|Maxwell|l=arch}}
 
* {{nvidia|Maxwell|l=arch}}
* {{nvidia|Pascal|l=arch}}
+
** GM107 (1 Gen) (2014)
* {{nvidia|Volta|l=arch}}
+
** GM204 (2 Gen) (2014)
* {{nvidia|Turing|l=arch}}
+
|width="17%" valign="top" align="left"|
* {{nvidia|Ampere|l=arch}}
+
* {{nvidia|Pascal|l=arch}} (2016)
 
+
* {{nvidia|Volta|l=arch}} (2017)
* {{nvidia|Hopper|l=arch}}
+
* {{nvidia|Turing|l=arch}} (2018)
* {{nvidia|Blackwell|l=arch}}
+
* {{nvidia|Ampere|l=arch}} (2020)
 +
* {{nvidia|Hopper|l=arch}} (2022)
 +
* ''{{nvidia|Ada Lovelace|l=arch}}'' (2022)
 +
|width="17%" valign="top" align="left"|
 +
* {{nvidia|Blackwell|l=arch}} (2024)
 +
* ''{{nvidia|Rubin|l=arch}}'' (2026)
 +
* ''{{nvidia|Rubin Ultra|l=arch}}'' (2027)
 +
* ''{{nvidia|Feynman|l=arch}}'' (2028)
 +
|}
 +
<!--
 +
NVIDIA
 +
NV3 (1997)
 +
NV4 (Fahrenheit) (1998)
 +
NV10 (Celsius) (1999)
 +
NV20 (Kelvin) (2001)
 +
NV30 (Rankin) (2003)
 +
NV40 (Curie) (2004)
 
* ''{{nvidia|Celsius|l=arch}}''
 
* ''{{nvidia|Celsius|l=arch}}''
 
* ''{{nvidia|Curie|l=arch}}''
 
* ''{{nvidia|Curie|l=arch}}''
 
* ''{{nvidia|Kelvin|l=arch}}''
 
* ''{{nvidia|Kelvin|l=arch}}''
* ''{{nvidia|Rankine|l=arch}}''
+
* ''{{nvidia|Rankin|l=arch}}''
* ''{{nvidia|Ada Lovelace|l=arch}}''
 
 
* ''{{nvidia|Rubin|l=arch}}''
 
* ''{{nvidia|Rubin|l=arch}}''
 +
G80/G92 (1st gen Tesla) (2006)
 +
G200/GT215 (2nd Generation Tesla) (2008)
 +
1st generation Fermi (GF100/GF104) (2010)
 +
2nd Generation Fermi (GF110/GF114) (2010)
 +
1st generation Kepler (GK104/GK110) (2012)
 +
2nd Generation Kepler (GK208) (2013)
 +
1st generation Maxwell (GM107) (2014)
 +
2nd Generation Maxwell (GM204) (2014)
 +
Pascal (2016)
 +
Volta (2017)
 +
Turing (2018)
 +
Ampere (2020)
 +
Ada Lovelace (2022)
 +
Blackwell (2025)
 +
-->
  
 
'''CPU:'''
 
'''CPU:'''
 +
{{collist
 +
| count = 4
 +
|
 
:'''ARM:'''
 
:'''ARM:'''
 
* {{nvidia|Denver|l=arch}}
 
* {{nvidia|Denver|l=arch}}
Line 190: Line 238:
 
* {{nvidia|Carmel|l=arch}}
 
* {{nvidia|Carmel|l=arch}}
 
*  {{nvidia|Tegra|l=arch}}
 
*  {{nvidia|Tegra|l=arch}}
 +
 
:'''RISC-V:'''
 
:'''RISC-V:'''
 
* {{nvidia|NV-RISCV|l=arch}}
 
* {{nvidia|NV-RISCV|l=arch}}
Line 198: Line 247:
 
== Comparison ==
 
== Comparison ==
 
:;Tegra
 
:;Tegra
 +
 
{|class="wikitable" style="font-size: 95%; text-align: center;"
 
{|class="wikitable" style="font-size: 95%; text-align: center;"
 
|+
 
|+
 
! colspan="2" |Generation
 
! colspan="2" |Generation
 
!Tegra 2
 
!Tegra 2
!Tegra 3
+
!Tegra 3 <br>(Kal-El)
!Tegra 4
+
!Tegra 4 <br>(Wayne)
!Tegra 4i
+
!Tegra 4i <br>(Grey)
! colspan="2" |Tegra K1
+
! colspan="2" |Tegra K1 <br>(Logan)
!Tegra X1
+
!Tegra X1 <br>(Erista)
!Tegra X1+
+
!Tegra X1+ <br>(Mariko)
!Tegra X2
+
!Tegra X2 <br>(Parker)
!Xavier
+
!{{nvidia|Tegra Xavier|Tegra <br>Xavier}}
!Orin
+
!Tegra <br>Orin
!Thor
+
!Tegra <br>Thor
 
|-
 
|-
! rowspan="5" |CPU
+
! rowspan="6" |CPU
!Instruction <br>set
+
!Models
| colspan="5" |[[ARMv7|ARMv7&#8209;A]] <br>(32&#8209;bit)
+
| AP25/T25 || T30/<!--T30L/AP33/-->T33 || T114 || T148 || T124 || T132 || T210 || T214 || T186 || T194 || T234 || T264?
| colspan="4" |[[ARMv8|ARMv8&#8209;A]] <br>(64&#8209;bit)
 
| colspan="2" |[[ARMv8|ARMv8.2&#8209;A]] <br>(64&#8209;bit)
 
| [[ARMv9|ARMv9.2&#8209;A]] <br>(64&#8209;bit)
 
 
|-
 
|-
 
!Cores
 
!Cores
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|2x <br>'''{{nvidia|Denver|l=arch}}'''
 
|2x <br>'''{{nvidia|Denver|l=arch}}'''
 
| colspan="2" |4x ARM Cortex-A53 <br>(disabled) +<br>4x ARM Cortex-A57
 
| colspan="2" |4x ARM Cortex-A53 <br>(disabled) +<br>4x ARM Cortex-A57
|2x '''{{nvidia|Denver|l=arch}}'''2 <br>+ 4x ARM <br>Cortex-A57
+
|2x '''{{nvidia|Denver|l=arch}}''' 2 <br>+ 4x ARM <br>Cortex-A57
 
|8x <br>'''{{nvidia|Carmel|l=arch}}'''
 
|8x <br>'''{{nvidia|Carmel|l=arch}}'''
 
|12x <br>Cortex<br>-A78AE
 
|12x <br>Cortex<br>-A78AE
|'''[[Neoverse]]''' <br>V3AE
+
|14x <br>'''[[Neoverse]]''' <br>V3AE
 +
|-
 +
!Instruction <br>set
 +
| colspan="5" |[[ARMv7|ARMv7&#8209;A]] <br>(32&#8209;bit)
 +
| colspan="4" |[[ARMv8|ARMv8&#8209;A]] <br>(64&#8209;bit)
 +
| colspan="2" |[[ARMv8|ARMv8.2&#8209;A]] <br>(64&#8209;bit)
 +
| [[ARMv9|ARMv9.2&#8209;A]] <br>(64&#8209;bit)
 
|-
 
|-
!L1 cache (I/D)
+
!L1 cache <br>(I/D)
 
| colspan="5" |32/32KB
 
| colspan="5" |32/32KB
 
|128/64KB
 
|128/64KB
Line 244: Line 297:
 
| colspan="2" |1 MB
 
| colspan="2" |1 MB
 
| colspan="4" |2 MB
 
| colspan="4" |2 MB
| colspan="2" |128KB <br>+ 2MB
+
| colspan="2" |128KB + 2MB
|2MB <br>+ 2MB
+
|2MB + 2MB
 
|8 MB
 
|8 MB
 
|3 MB
 
|3 MB
| colspan="1" style="text-align:center;" |?
+
|14 MB
 
|-
 
|-
 
!L3 cache
 
!L3 cache
Line 254: Line 307:
 
|4 MB
 
|4 MB
 
|6 MB
 
|6 MB
| colspan="2" style="text-align:center;" |?
+
|16 MB
 
|-
 
|-
 
! rowspan="4" |GPU
 
! rowspan="4" |GPU
Line 275: Line 328:
 
|512
 
|512
 
|2048
 
|2048
|?
+
|2540
 
|-
 
|-
 
!Tensor cores
 
!Tensor cores
 
| colspan="9" |N/A
 
| colspan="9" |N/A
 
| colspan="2" |64
 
| colspan="2" |64
|?
+
|96
 
|-
 
|-
 
!RT cores
 
!RT cores
Line 294: Line 347:
 
|LPDDR3/ <br>LPDDR4
 
|LPDDR3/ <br>LPDDR4
 
| colspan="3" |LPDDR4/ <br>LPDDR4X
 
| colspan="3" |LPDDR4/ <br>LPDDR4X
|LPDDR5
+
| colspan="2" |LPDDR5/5X
|?
 
 
|-
 
|-
 
!Max. size
 
!Max. size
Line 315: Line 367:
 
|136.5 <br>GB/s
 
|136.5 <br>GB/s
 
|204.8 <br>GB/s
 
|204.8 <br>GB/s
|?
+
|273.0 <br>GB/s
 
|-
 
|-
 
! colspan="2" |Process
 
! colspan="2" |Process
Line 324: Line 376:
 
|[[12 nm]]
 
|[[12 nm]]
 
|[[8 nm]]
 
|[[8 nm]]
|[[4 nm]]
+
|[[5 nm|4 nm]]
 
|-
 
|-
 
|}
 
|}

Latest revision as of 15:41, 4 May 2025

NVIDIA
nvidia logo.svg
Type Public
Founded 1993
Founder Jen-Hsun Huang
Chris Malachowsky
Curtis Priem
Headquarters Santa Clara, California
Website http://www.nvidia.com

NVIDIA Corporation is an American fabless semiconductor company that focuses largely on graphics processing units for the gaming industry and machine learning applications. They also design various other chips, SoC, and consumer electronics for the mobile and automotive markets.

GPU Families[edit]

CPU Families[edit]

GoForce
  • GoForce
Tegra

Microarchitectures[edit]

GPUs:

  • Tesla
    • G80/G92 (1 Gen) (2006)
    • G200/GT215 (2 Gen) (2008)
  • Fermi
    • GF100/GF104 (1 Gen) (2010)
    • GF110/GF114 (2 Gen) (2010)
  • Kepler
    • GK104/GK110 (1 Gen) (2012)
    • GK208 (2 Gen) (2013)
  • Maxwell
    • GM107 (1 Gen) (2014)
    • GM204 (2 Gen) (2014)

CPU:

Comparison[edit]

Tegra
Generation Tegra 2 Tegra 3
(Kal-El)
Tegra 4
(Wayne)
Tegra 4i
(Grey)
Tegra K1
(Logan)
Tegra X1
(Erista)
Tegra X1+
(Mariko)
Tegra X2
(Parker)
Tegra
Xavier
Tegra
Orin
Tegra
Thor
CPU Models AP25/T25 T30/T33 T114 T148 T124 T132 T210 T214 T186 T194 T234 T264?
Cores 2x ARM
Cortex-A9
4+1x ARM
Cortex-A9
4+1x ARM
Cortex-A15
4+1x ARM
Cortex-A9
4+1x ARM
Cortex-A15
2x
Denver
4x ARM Cortex-A53
(disabled) +
4x ARM Cortex-A57
2x Denver 2
+ 4x ARM
Cortex-A57
8x
Carmel
12x
Cortex
-A78AE
14x
Neoverse
V3AE
Instruction
set
ARMv7‑A
(32‑bit)
ARMv8‑A
(64‑bit)
ARMv8.2‑A
(64‑bit)
ARMv9.2‑A
(64‑bit)
L1 cache
(I/D)
32/32KB 128/64KB 32/32KB
+ 64/32KB
128/64KB
+ 48/32KB
128/64KB 64/64KB
L2 cache 1 MB 2 MB 128KB + 2MB 2MB + 2MB 8 MB 3 MB 14 MB
L3 cache N/A 4 MB 6 MB 16 MB
GPU Architecture Vec4 Kepler Maxwell Pascal Volta Ampere Blackwell
CUDA cores 4+4* 8+4* 48+24* 48+12* 192 256 512 2048 2540
Tensor cores N/A 64 96
RT cores N/A 8 ?
RAM Protocol DDR2/
LPDDR2
DDR3/
LPDDR2
DDR3/
LPDDR3
LPDDR3/
LPDDR4
LPDDR4/
LPDDR4X
LPDDR5/5X
Max. size 1 GB 2 GB 4 GB 8 GB 64 GB 128 GB
Bandwidth 2.7 GB/s 6.4 GB/s 7.5 GB/s 14.9 GB/s 25.6
GB/s
34.1
GB/s
59.7
GB/s
136.5
GB/s
204.8
GB/s
273.0
GB/s
Process 40 nm 28 nm 20 nm 16 nm 12 nm 8 nm 4 nm
  • VLIW-based Vec4: Pixel shaders + Vertex shaders. Since Kepler, Unified shaders are used.

Technology[edit]

Facts about "Nvidia"
company typepublic +
founded1993 +
founderJen-Hsun Huang +, Chris Malachowsky + and Curtis Priem +
full page namenvidia +
headquartersSanta Clara, California +
instance ofsemiconductor company +
nameNVIDIA +
websitehttp://www.nvidia.com +
wikidata idQ182477 +