From WikiChip
Difference between revisions of "amd/ryzen 5/2600"
< amd‎ | ryzen 5

(Replaced package module by package name.)
 
(2 intermediate revisions by 2 users not shown)
Line 38: Line 38:
 
|max cpus=1
 
|max cpus=1
 
|tdp=65 W
 
|tdp=65 W
|package module 1={{packages/amd/socket am4}}
+
|package name 1=amd,socket am4
 
}}
 
}}
 
'''Ryzen 5 2600''' is a {{arch|64}} [[hexa-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[AMD]] in early [[2018]]. Fabricated on GlobalFoundries [[12 nm process]] based on the {{amd|Zen+|Zen+ microarchitecture|l=arch}}, this processor operates at 3.4 GHz with a [[TDP]] of 65 W and a {{amd|Precision Boost|Boost}} frequency of up to 3.9 GHz. The 2600 supports up to 64 GiB of dual-channel DDR4-2933 memory.
 
'''Ryzen 5 2600''' is a {{arch|64}} [[hexa-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[AMD]] in early [[2018]]. Fabricated on GlobalFoundries [[12 nm process]] based on the {{amd|Zen+|Zen+ microarchitecture|l=arch}}, this processor operates at 3.4 GHz with a [[TDP]] of 65 W and a {{amd|Precision Boost|Boost}} frequency of up to 3.9 GHz. The 2600 supports up to 64 GiB of dual-channel DDR4-2933 memory.
Line 44: Line 44:
 
== Cache ==
 
== Cache ==
 
{{main|amd/microarchitectures/zen+#Memory_Hierarchy|l1=Zen+ § Cache}}
 
{{main|amd/microarchitectures/zen+#Memory_Hierarchy|l1=Zen+ § Cache}}
{{cache size}}
+
{{cache size
 +
|l1 cache=576 KiB
 +
|l1i cache=384 KiB
 +
|l1i break=6x64 KiB
 +
|l1i desc=4-way set associative
 +
|l1d cache=192 KiB
 +
|l1d break=6x32 KiB
 +
|l1d desc=8-way set associative
 +
|l1d policy=write-back
 +
|l2 cache=3 MiB
 +
|l2 break=6x512 KiB
 +
|l2 desc=8-way set associative
 +
|l2 policy=write-back
 +
|l3 cache=16 MiB
 +
|l3 break=2x8 MiB
 +
|l3 desc=16-way set associative
 +
}}
  
 
== Memory controller ==
 
== Memory controller ==
 
{{memory controller
 
{{memory controller
|type=DDR4-3200
+
|type=DDR4-2933
 
|ecc=Yes
 
|ecc=Yes
 
|max mem=128 GiB
 
|max mem=128 GiB

Latest revision as of 23:02, 25 March 2023

Edit Values
Ryzen 5 2600
General Info
DesignerAMD
ManufacturerGlobalFoundries
Model Number2600
Part NumberYD2600BBM6IAF
MarketDesktop
IntroductionApril 13, 2018 (announced)
April 19, 2018 (launched)
Release Price$170
ShopAmazon
General Specs
FamilyRyzen 5
Series2000
LockedNo
Frequency3,400 MHz
Turbo Frequency3,900 MHz
Bus rate4 × 8 GT/s
Clock multiplier34
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen+
ChipsetPromontory
Core NamePinnacle Ridge
Core Family23
Core Model8
Core SteppingB2
Process12 nm
Transistors4,800,000,000
TechnologyCMOS
Die213 mm²
Word Size64 bit
Cores6
Threads12
Max Memory128 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP65 W
Packaging
PackageOPGA-1331
Package TypeOrganic Micro Pin Grid Array
Dimension40 mm × 40 mm
Pitch1 mm
Contacts1331
SocketSocket AM4

Ryzen 5 2600 is a 64-bit hexa-core mid-range performance x86 desktop microprocessor introduced by AMD in early 2018. Fabricated on GlobalFoundries 12 nm process based on the Zen+ microarchitecture, this processor operates at 3.4 GHz with a TDP of 65 W and a Boost frequency of up to 3.9 GHz. The 2600 supports up to 64 GiB of dual-channel DDR4-2933 memory.

Cache[edit]

Main article: Zen+ § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$576 KiB
589,824 B
0.563 MiB
L1I$384 KiB
393,216 B
0.375 MiB
6x64 KiB4-way set associative 
L1D$192 KiB
196,608 B
0.188 MiB
6x32 KiB8-way set associativewrite-back

L2$3 MiB
3,072 KiB
3,145,728 B
0.00293 GiB
  6x512 KiB8-way set associativewrite-back

L3$16 MiB
16,384 KiB
16,777,216 B
0.0156 GiB
  2x8 MiB16-way set associative 

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2933
Supports ECCYes
Max Mem128 GiB
Controllers2
Channels2
Max Bandwidth43.71 GiB/s
44,759.04 MiB/s
46.933 GB/s
46,933.255 MB/s
0.0427 TiB/s
0.0469 TB/s
Bandwidth
Single 21.86 GiB/s
Double 43.71 GiB/s
[Edit] Memory Configurations
Dual Channel Single Rank 2 of 2 DDR4-2933*
2 of 4 DDR4-2933*
4 of 4 DDR4-2133
Double Rank 2 of 2 DDR4-2667
2 of 4 DDR4-2400
4 of 4 DDR4-1866

Expansions[edit]

The 2600 includes 20 PCIe lanes - 16 for a discrete graphics processor and 4 for storage (NVMe or 2 ports SATA Express).

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes20
Configs1x16+1x4
USB
Revision3.0, 2.0
Ports4
Rate5 Gbit/s
SATA
Revision3.0
Ports4
  • SPI, LPC, UART, I2C, SMBus

Graphics[edit]

This processor has no integrated graphics.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
SSE4aStreaming SIMD Extensions 4a
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
SHASHA Extensions
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
SMTSimultaneous Multithreading
AMD-ViAMD-Vi (I/O MMU virtualization)
AMD-VAMD Virtualization
SenseMISenseMI Technology
XFR 2Extended Frequency Range 2
Boost 2Precision Boost 2
Facts about "Ryzen 5 2600 - AMD"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Ryzen 5 2600 - AMD#io +
base frequency3,400 MHz (3.4 GHz, 3,400,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
chipsetPromontory +
clock multiplier34 +
core count6 +
core family23 +
core model8 +
core namePinnacle Ridge +
core steppingB2 +
designerAMD +
die area213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) +
familyRyzen 5 +
first announcedApril 13, 2018 +
first launchedApril 19, 2018 +
full page nameamd/ryzen 5/2600 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has amd amd-v technologytrue +
has amd amd-vi technologytrue +
has amd extended frequency range 2true +
has amd precision boost 2true +
has amd sensemi technologytrue +
has ecc memory supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, SenseMI Technology +, Extended Frequency Range 2 + and Precision Boost 2 +
has locked clock multiplierfalse +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
ldate3000 +
manufacturerGlobalFoundries +
market segmentDesktop +
max cpu count1 +
max memory131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth43.71 GiB/s (44,759.04 MiB/s, 46.933 GB/s, 46,933.255 MB/s, 0.0427 TiB/s, 0.0469 TB/s) +
max memory channels2 +
max pcie lanes20 +
microarchitectureZen+ +
model number2600 +
nameRyzen 5 2600 +
part numberYD2600BBM6IAF +
process12 nm (0.012 μm, 1.2e-5 mm) +
release price$ 170.00 (€ 153.00, £ 137.70, ¥ 17,566.10) +
series2000 +
smp max ways1 +
supported memory typeDDR4-3200 +
tdp65 W (65,000 mW, 0.0872 hp, 0.065 kW) +
technologyCMOS +
thread count12 +
transistor count4,800,000,000 +
turbo frequency3,900 MHz (3.9 GHz, 3,900,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +