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Difference between revisions of "x86"

 
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{{x86 isa main}}
 
{{x86 isa main}}
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'''x86''' is a family of [[little-endian]], [[variable-length]], [[instruction set architectures]] and [[instruction set architectures extension|extensions]]. As its namesake indicates, the x86 ISA offers [[binary compatibility]] all the way from the original {{intel|8086}} to modern [[microarchitecture]]s as well as [[source code compatibility]] since the {{intel|8080}}. The x86 architecture is widely used in the [[desktop]] and [[server]] markets. Today, custom x86-based implementations are designed by a number of [[semiconductor companies|companies]] including [[Intel]], [[AMD]], [[VIA]], [[Zhaoxin]], [[DM&P]], and [[RDC Semiconductors|RDC]].
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'''x86''' is a family of [[little-endian]] [[variable-length]] [[instruction set architectures]] and [[instruction set architectures extension|extensions]]. As its namesake indicates, the x86 ISA offers [[binary compatibility]] all the way from the original {{intel|8086}} to modern [[microarchitecture]]s as well as [[source code compatibility]] since the {{intel|8080}}. The x86 architecture is widely used in the [[desktop]] and [[server]] markets. Today, custom x86-based implementations are designed by a number of [[semiconductor companies|companies]] including [[Intel]], [[AMD]], [[VIA]], [[Zhaoxin]], [[DM&P]], and [[RDC Semiconductors|RDC]].
  
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Generally speaking, the term 'x86' encompasses the original {{x86|x86-16}}, {{x86|x86-32}} (IA-32), {{x86|x86-64}} (AMD64), and the various extensions such as {{x86|MMX}}, {{x86|3DNOW!}}, and {{x86|SSE}}.
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Generally speaking, the term 'x86' is most often used as an umbrella term encompassing the original {{x86|x86-16}}, {{x86|x86-32}} (IA-32), {{x86|x86-64}} (AMD64), and the various extensions such as {{x86|MMX}}, {{x86|3DNOW!}}, and {{x86|SSE}}.
  
 
== History ==
 
== History ==
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=== Registers ===
 
=== Registers ===
 
{{empty section}}
 
{{empty section}}
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{| class="wikitable"
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|-
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! Quad word (8 bytes) !! Double word (4 bytes) !! Word (2 bytes) !! Byte 1 !! Byte 0
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|-
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| %rax ||  %eax ||  %ax ||  %ah ||  %al
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|-
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| %rcx ||  %ecx ||  %cx ||  %ch ||  %cl
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|-
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| %rdx ||  %edx ||  %dx ||  %dh ||  %dl
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|-
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| %rbx ||  %ebx ||  %bx ||  %bh ||  %bl
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|-
 +
| %rsi ||  %esi ||  %si ||      ||  %sil
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|-
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| %rdi ||  %edi ||  %di ||      ||  %dil
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|-
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| %rsp ||  %esp ||  %sp ||      ||  %spl
 +
|-
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| %rbp ||  %ebp ||  %bp ||      ||  %bpl
 +
|-
 +
| %r8 ||  %r8d ||  %r8w ||      ||  %r8b
 +
|-
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| %r9 ||  %r9d ||  %r9w ||      ||  %r9b
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|-
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| %r10 ||  %r10d ||  %r10w ||  ||  %r10b
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|-
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| %r11 ||  %r11d ||  %r11w ||  ||  %r11b
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|-
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| %r12 ||  %r12d ||  %r12w ||  ||  %r12b
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|-
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| %r13 ||  %r13d ||  %r13w ||  ||  %r13b
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|-
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| %r14 ||  %r14d ||  %r14w ||  ||  %r14b
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|-
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| %r15 ||  %r15d ||  %r15w ||  ||  %r15b
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|}
 
=== Operation Modes ===
 
=== Operation Modes ===
 
{{empty section}}
 
{{empty section}}
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{{stub}}
 
{{stub}}
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[[category:instruction set architectures]]
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[[category:x86]]
  
 
[[designer::Intel| ]]
 
[[designer::Intel| ]]

Latest revision as of 10:29, 10 July 2021

x86
Instruction Set Architecture
General
Variants
Topics
CPUIDs
Modes
Extensions(all)
v · d · e

x86 is a family of little-endian variable-length instruction set architectures and extensions. As its namesake indicates, the x86 ISA offers binary compatibility all the way from the original 8086 to modern microarchitectures as well as source code compatibility since the 8080. The x86 architecture is widely used in the desktop and server markets. Today, custom x86-based implementations are designed by a number of companies including Intel, AMD, VIA, Zhaoxin, DM&P, and RDC.

Generally speaking, the term 'x86' is most often used as an umbrella term encompassing the original x86-16, x86-32 (IA-32), x86-64 (AMD64), and the various extensions such as MMX, 3DNOW!, and SSE.

History[edit]

Main article: History of x86
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Overview[edit]

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Registers[edit]

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Quad word (8 bytes) Double word (4 bytes) Word (2 bytes) Byte 1 Byte 0
 %rax  %eax  %ax  %ah  %al
 %rcx  %ecx  %cx  %ch  %cl
 %rdx  %edx  %dx  %dh  %dl
 %rbx  %ebx  %bx  %bh  %bl
 %rsi  %esi  %si  %sil
 %rdi  %edi  %di  %dil
 %rsp  %esp  %sp  %spl
 %rbp  %ebp  %bp  %bpl
 %r8  %r8d  %r8w  %r8b
 %r9  %r9d  %r9w  %r9b
 %r10  %r10d  %r10w  %r10b
 %r11  %r11d  %r11w  %r11b
 %r12  %r12d  %r12w  %r12b
 %r13  %r13d  %r13w  %r13b
 %r14  %r14d  %r14w  %r14b
 %r15  %r15d  %r15w  %r15b

Operation Modes[edit]

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Instruction Set[edit]

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Syntaxes[edit]

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Interrupts[edit]

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Extensions[edit]

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Implementations[edit]

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See also[edit]


Text document with shapes.svg This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information.
1 octets
2 nibbles
2 octets
4 nibbles
4 octets
8 nibbles
8 octets
16 nibbles



Retrieved from "https://en.wikichip.org/w/index.php?title=x86&oldid=99074"
Facts about "x86"
RDF feed
designVon Neumann +
designerIntel + and AMD +
dev modelProprietary +
endiannessLittle-endian +
first launched1978 +
formatRegister-Memory +
full page namex86 +
namex86 +
word size8 bit (1 octets, 2 nibbles) +, 16 bit (2 octets, 4 nibbles) +, 32 bit (4 octets, 8 nibbles) + and 64 bit (8 octets, 16 nibbles) +