Semiconductor & Computer Engineering
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| Line 33: | Line 33: | ||
* 445 mm² (TU106) | * 445 mm² (TU106) | ||
| | | | ||
| − | * 8x 74 mm² + 1x 416 mm² (Rome) | + | * 8x 74 mm² + 1x 416 mm² ({{amd|Rome|l=core}}) |
| − | * 4x 213 mm² (Naples) | + | * 4x 213 mm² ({{amd|Naples|l=core}}) |
| − | * 720 mm² (Knights Corner) | + | * 720 mm² ({{intel|Knights Corner|l=arch}}) |
* 694 mm² (SKL LCC) | * 694 mm² (SKL LCC) | ||
| − | * 693 mm² (Power9) | + | * 693 mm² ({{ibm|Power9|l=arch}}) |
* 662 mm² (HSW HCC) | * 662 mm² (HSW HCC) | ||
| − | * 649 mm² (Power8) | + | * 649 mm² ({{ibm|Power8|l=arch}}) |
* 637 mm² (SPARC64 X) | * 637 mm² (SPARC64 X) | ||
* 600 mm² (SPARC64 X+) | * 600 mm² (SPARC64 X+) | ||
| − | * 567 mm² (Power7) | + | * 567 mm² ({{ibm|Power7|l=arch}}) |
* 513 mm² (SPARC64 VIIIfx) | * 513 mm² (SPARC64 VIIIfx) | ||
* 492 mm² (HSW MCC) | * 492 mm² (HSW MCC) | ||
| Line 49: | Line 49: | ||
* 444 mm² (SPARC64 VII) | * 444 mm² (SPARC64 VII) | ||
* 421 mm² (SPARC64 VI) | * 421 mm² (SPARC64 VI) | ||
| − | * 412 mm² (Power4) | + | * 412 mm² ({{ibm|Power4|l=arch}}) |
* 389 mm² (Power5) | * 389 mm² (Power5) | ||
* 380 mm² (SPARC64 V) | * 380 mm² (SPARC64 V) | ||
Revision as of 13:14, 11 May 2020
A die is the actual bare IC chip and is the final product of the fabrication process. It is the individual chip made following the singulation of a wafer. Dies typically undergo packaging before being sold to the customer as a final product.
Contents
Overview
The die is the final product of the fabrication process. A fully processed wafer will under singulation following probing. Depending on the application, the die may be shipped to an assembly/packaging plant where it will undergo encapsulation, producing the final chip that ships to customers.
Known good die
- Main article: Known Good Die (KGD)
A known good die is a special type of bare die that underwent additional testing and screening post-singulation. KGD testing ensures the die meets the required specification prior to getting packaged. KGDs are especially important in multi-chip packages where multiple dies in a single package must function correctly to produce the required product.
Die size
Die size refers to the length and width of the die. Since the die size and shape determines the total number of dies that may be realized from a single wafer, the die size is a strong indicator of cost.
| Select Large Dies | |||
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| GPU | Server | Desktop | Mobile |
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