Revision as of 22:00, 10 February 2020

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Ethos
General Info
Designer	Arm Holdings
Manufacturer	TSMC, Samsung, UMC
Introduction	October 23, 2019 (announced) October 23, 2019 (launched)
Microarchitecture
Microarchitecture	MLP

Ethos is a family of synthesizable neural processor IPs designed by Arm for IoT and edge applications.

Overview

First introduced in late 2019, Ethos is a family of synthesizable neural processor IPs designed by Arm for various markets. The Ethos family represents the series of NPUs as part of Project Trillium. The underlying microarchitecture for all the Ethos NPUs is the MLP which is designed to be scalable through various configurations based on the SRAM sizes and the number of compute engines.

Members

N-Series

The Ethos-N series was introduced in October 2019. These are fully independent mainstream mobile and IoT NPUs which can be integrated into any SoC just like the Cortex family. These NPUs designed to scale from 1-4 TOPS and from 250 mW up to 1.5 W. Multiple instances of those IPs may be combined using Arm's CCN-500 or CMN-600 interconnects to scale to higher performance.

U-Series

The Ethos-U series was introduced in early 2020. This series targets deeply-embedded AI applications. The 'microNPUs' in this series are not complete NPUs like the Ethos-N series. Instead, they feature a much slimmer design. The Ethos-U series is designed to tightly work with a companion Cortex-M processor such as the Cortex-M55 (The M55 is preferred due to its Helium extension support but but other cores such as M7, M4, and the M33 should do fine). Conceptually, the U series can be thought of as a single-compute engine (CE) design whereby the PLE is removed and instead, relies on using a companion Cortex-M core for the extra processing. Due to the power and area constraints, the dedicated SRAM banks are also removed and instead rely on using the shared SoC (or ideally, the Cortex-M cache) for the weights and activations.

See also

• Intel Habana HL Series