From WikiChip
					
    Difference between revisions of "intel/xeon platinum/8176m"    
                	
														|  (Created page with "{{intel title|Xeon Platinum 8176M}}") | |||
| (27 intermediate revisions by 5 users not shown) | |||
| Line 1: | Line 1: | ||
| {{intel title|Xeon Platinum 8176M}} | {{intel title|Xeon Platinum 8176M}} | ||
| + | {{chip | ||
| + | |name=Xeon Platinum 8176M | ||
| + | |image=skylake sp (basic).png | ||
| + | |designer=Intel | ||
| + | |manufacturer=Intel | ||
| + | |model number=8176M | ||
| + | |part number=CD8067303133605 | ||
| + | |s-spec=SR37U | ||
| + | |s-spec qs=QM7R | ||
| + | |market=Server | ||
| + | |first announced=April 25, 2017 | ||
| + | |first launched=July 11, 2017 | ||
| + | |release price=$11722.00 | ||
| + | |family=Xeon Platinum | ||
| + | |series=8000 | ||
| + | |frequency=2,100 MHz | ||
| + | |turbo frequency1=3,800 MHz | ||
| + | |clock multiplier=21 | ||
| + | |cpuid=0x50654 | ||
| + | |isa=x86-64 | ||
| + | |isa family=x86 | ||
| + | |microarch=Skylake (server) | ||
| + | |platform=Purley | ||
| + | |chipset=Lewisburg | ||
| + | |core name=Skylake SP | ||
| + | |core family=6 | ||
| + | |core stepping=H0 | ||
| + | |process=14 nm | ||
| + | |technology=CMOS | ||
| + | |word size=64 bit | ||
| + | |core count=28 | ||
| + | |thread count=56 | ||
| + | |max memory=1,536 GiB | ||
| + | |max cpus=8 | ||
| + | |smp interconnect=UPI | ||
| + | |smp interconnect links=3 | ||
| + | |smp interconnect rate=10.4 GT/s | ||
| + | |tdp=165 W | ||
| + | |tcase min=0 °C | ||
| + | |tcase max=89 °C | ||
| + | |dts min=0 °C | ||
| + | |dts max=97 °C | ||
| + | |package name 1=intel,fclga_3647 | ||
| + | |successor=Xeon Platinum 8276M | ||
| + | |successor link=intel/xeon_platinum/8276m | ||
| + | }} | ||
| + | '''Xeon Platinum 8176M''' is a {{arch|64}} [[28-core]] [[x86]] multi-socket highest performance server microprocessor introduced by [[Intel]] in mid-2017. This chip supports up to 8-way multiprocessing. The Platinum 8176M, which is based on the server configuration of the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2.1 GHz with a TDP of 165 W and a {{intel|turbo boost}} frequency of up to 3.8 GHz, supports up 1.5 TiB of hexa-channel DDR4-2666 ECC memory. | ||
| + | |||
| + | As indicated by the ''M'' suffix, this specific model supports double the memory capacity for up to 1.5 TiB per socket. | ||
| + | |||
| + | == Cache == | ||
| + | {{main|intel/microarchitectures/skylake_(server)#Memory_Hierarchy|l1=Skylake § Cache}} | ||
| + | {{cache size | ||
| + | |l1 cache=1.75 MiB | ||
| + | |l1i cache=896 KiB | ||
| + | |l1i break=28x32 KiB | ||
| + | |l1i desc=8-way set associative | ||
| + | |l1d cache=896 KiB | ||
| + | |l1d break=28x32 KiB | ||
| + | |l1d desc=8-way set associative | ||
| + | |l1d policy=write-back | ||
| + | |l2 cache=28 MiB | ||
| + | |l2 break=28x1 MiB | ||
| + | |l2 desc=16-way set associative | ||
| + | |l2 policy=write-back | ||
| + | |l3 cache=38.5 MiB | ||
| + | |l3 break=28x1.375 MiB | ||
| + | |l3 desc=11-way set associative | ||
| + | |l3 policy=write-back | ||
| + | }} | ||
| + | |||
| + | == Memory controller == | ||
| + | {{memory controller | ||
| + | |type=DDR4-2666 | ||
| + | |ecc=Yes | ||
| + | |max mem=1,536 GiB | ||
| + | |controllers=2 | ||
| + | |channels=6 | ||
| + | |max bandwidth=119.21 GiB/s | ||
| + | |bandwidth schan=19.87 GiB/s | ||
| + | |bandwidth dchan=39.74 GiB/s | ||
| + | |bandwidth qchan=79.47 GiB/s | ||
| + | |bandwidth hchan=119.21 GiB/s | ||
| + | }} | ||
| + | |||
| + | == Expansions == | ||
| + | {{expansions | ||
| + | | pcie revision      = 3.0 | ||
| + | | pcie lanes         = 48 | ||
| + | | pcie config        = x16 | ||
| + | | pcie config 2      = x8 | ||
| + | | pcie config 3      = x4 | ||
| + | }} | ||
| + | |||
| + | == Features ==  | ||
| + | {{x86 features | ||
| + | |real=Yes | ||
| + | |protected=Yes | ||
| + | |smm=Yes | ||
| + | |fpu=Yes | ||
| + | |x8616=Yes | ||
| + | |x8632=Yes | ||
| + | |x8664=Yes | ||
| + | |nx=Yes | ||
| + | |mmx=Yes | ||
| + | |emmx=Yes | ||
| + | |sse=Yes | ||
| + | |sse2=Yes | ||
| + | |sse3=Yes | ||
| + | |ssse3=Yes | ||
| + | |sse41=Yes | ||
| + | |sse42=Yes | ||
| + | |sse4a=No | ||
| + | |avx=Yes | ||
| + | |avx2=Yes | ||
| + | |avx512f=Yes | ||
| + | |avx512cd=Yes | ||
| + | |avx512er=No | ||
| + | |avx512pf=No | ||
| + | |avx512bw=Yes | ||
| + | |avx512dq=Yes | ||
| + | |avx512vl=Yes | ||
| + | |avx512ifma=No | ||
| + | |avx512vbmi=No | ||
| + | |avx5124fmaps=No | ||
| + | |avx5124vnniw=No | ||
| + | |avx512vpopcntdq=No | ||
| + | |abm=Yes | ||
| + | |tbm=No | ||
| + | |bmi1=Yes | ||
| + | |bmi2=Yes | ||
| + | |fma3=Yes | ||
| + | |fma4=No | ||
| + | |aes=Yes | ||
| + | |rdrand=Yes | ||
| + | |sha=No | ||
| + | |xop=No | ||
| + | |adx=Yes | ||
| + | |clmul=Yes | ||
| + | |f16c=Yes | ||
| + | |tbt1=No | ||
| + | |tbt2=Yes | ||
| + | |tbmt3=No | ||
| + | |bpt=No | ||
| + | |eist=Yes | ||
| + | |sst=Yes | ||
| + | |flex=No | ||
| + | |fastmem=No | ||
| + | |ivmd=Yes | ||
| + | |intelnodecontroller=Yes | ||
| + | |intelnode=Yes | ||
| + | |kpt=Yes | ||
| + | |ptt=Yes | ||
| + | |intelrunsure=Yes | ||
| + | |mbe=Yes | ||
| + | |isrt=No | ||
| + | |sba=No | ||
| + | |mwt=No | ||
| + | |sipp=No | ||
| + | |att=No | ||
| + | |ipt=No | ||
| + | |tsx=Yes | ||
| + | |txt=Yes | ||
| + | |ht=Yes | ||
| + | |vpro=Yes | ||
| + | |vtx=Yes | ||
| + | |vtd=Yes | ||
| + | |ept=Yes | ||
| + | |mpx=No | ||
| + | |sgx=No | ||
| + | |securekey=No | ||
| + | |osguard=No | ||
| + | |3dnow=No | ||
| + | |e3dnow=No | ||
| + | |smartmp=No | ||
| + | |powernow=No | ||
| + | |amdvi=No | ||
| + | |amdv=No | ||
| + | |amdsme=No | ||
| + | |amdtsme=No | ||
| + | |amdsev=No | ||
| + | |rvi=No | ||
| + | |smt=No | ||
| + | |sensemi=No | ||
| + | |xfr=No | ||
| + | }} | ||
| + | |||
| + | == Frequencies == | ||
| + | {{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}} | ||
| + | {{frequency table | ||
| + | |freq_base=2,100 MHz | ||
| + | |freq_1=3,800 MHz | ||
| + | |freq_2=3,800 MHz | ||
| + | |freq_3=3,600 MHz | ||
| + | |freq_4=3,600 MHz | ||
| + | |freq_5=3,500 MHz | ||
| + | |freq_6=3,500 MHz | ||
| + | |freq_7=3,500 MHz | ||
| + | |freq_8=3,500 MHz | ||
| + | |freq_9=3,500 MHz | ||
| + | |freq_10=3,500 MHz | ||
| + | |freq_11=3,500 MHz | ||
| + | |freq_12=3,500 MHz | ||
| + | |freq_13=3,400 MHz | ||
| + | |freq_14=3,400 MHz | ||
| + | |freq_15=3,400 MHz | ||
| + | |freq_16=3,400 MHz | ||
| + | |freq_17=3,100 MHz | ||
| + | |freq_18=3,100 MHz | ||
| + | |freq_19=3,100 MHz | ||
| + | |freq_20=3,100 MHz | ||
| + | |freq_21=2,900 MHz | ||
| + | |freq_22=2,900 MHz | ||
| + | |freq_23=2,900 MHz | ||
| + | |freq_24=2,900 MHz | ||
| + | |freq_25=2,800 MHz | ||
| + | |freq_26=2,800 MHz | ||
| + | |freq_27=2,800 MHz | ||
| + | |freq_28=2,800 MHz | ||
| + | |freq_avx2_base=1,700 MHz | ||
| + | |freq_avx2_1=3,600 MHz | ||
| + | |freq_avx2_2=3,600 MHz | ||
| + | |freq_avx2_3=3,400 MHz | ||
| + | |freq_avx2_4=3,400 MHz | ||
| + | |freq_avx2_5=3,300 MHz | ||
| + | |freq_avx2_6=3,300 MHz | ||
| + | |freq_avx2_7=3,300 MHz | ||
| + | |freq_avx2_8=3,300 MHz | ||
| + | |freq_avx2_9=3,300 MHz | ||
| + | |freq_avx2_10=3,300 MHz | ||
| + | |freq_avx2_11=3,300 MHz | ||
| + | |freq_avx2_12=3,300 MHz | ||
| + | |freq_avx2_13=2,900 MHz | ||
| + | |freq_avx2_14=2,900 MHz | ||
| + | |freq_avx2_15=2,900 MHz | ||
| + | |freq_avx2_16=2,900 MHz | ||
| + | |freq_avx2_17=2,700 MHz | ||
| + | |freq_avx2_18=2,700 MHz | ||
| + | |freq_avx2_19=2,700 MHz | ||
| + | |freq_avx2_20=2,700 MHz | ||
| + | |freq_avx2_21=2,500 MHz | ||
| + | |freq_avx2_22=2,500 MHz | ||
| + | |freq_avx2_23=2,500 MHz | ||
| + | |freq_avx2_24=2,500 MHz | ||
| + | |freq_avx2_25=2,400 MHz | ||
| + | |freq_avx2_26=2,400 MHz | ||
| + | |freq_avx2_27=2,400 MHz | ||
| + | |freq_avx2_28=2,400 MHz | ||
| + | |freq_avx512_base=1,300 MHz | ||
| + | |freq_avx512_1=3,500 MHz | ||
| + | |freq_avx512_2=3,500 MHz | ||
| + | |freq_avx512_3=3,300 MHz | ||
| + | |freq_avx512_4=3,300 MHz | ||
| + | |freq_avx512_5=3,000 MHz | ||
| + | |freq_avx512_6=3,000 MHz | ||
| + | |freq_avx512_7=3,000 MHz | ||
| + | |freq_avx512_8=3,000 MHz | ||
| + | |freq_avx512_9=2,600 MHz | ||
| + | |freq_avx512_10=2,600 MHz | ||
| + | |freq_avx512_11=2,600 MHz | ||
| + | |freq_avx512_12=2,600 MHz | ||
| + | |freq_avx512_13=2,300 MHz | ||
| + | |freq_avx512_14=2,300 MHz | ||
| + | |freq_avx512_15=2,300 MHz | ||
| + | |freq_avx512_16=2,300 MHz | ||
| + | |freq_avx512_17=2,100 MHz | ||
| + | |freq_avx512_18=2,100 MHz | ||
| + | |freq_avx512_19=2,100 MHz | ||
| + | |freq_avx512_20=2,100 MHz | ||
| + | |freq_avx512_21=2,000 MHz | ||
| + | |freq_avx512_22=2,000 MHz | ||
| + | |freq_avx512_23=2,000 MHz | ||
| + | |freq_avx512_24=2,000 MHz | ||
| + | |freq_avx512_25=1,900 MHz | ||
| + | |freq_avx512_26=1,900 MHz | ||
| + | |freq_avx512_27=1,900 MHz | ||
| + | |freq_avx512_28=1,900 MHz | ||
| + | }} | ||
| + | |||
| + | [[Category:microprocessor models by intel based on skylake extreme core count die]] | ||
Latest revision as of 02:38, 29 December 2019
| Edit Values | |
| Xeon Platinum 8176M | |
|  | |
| General Info | |
| Designer | Intel | 
| Manufacturer | Intel | 
| Model Number | 8176M | 
| Part Number | CD8067303133605 | 
| S-Spec | SR37U QM7R (QS) | 
| Market | Server | 
| Introduction | April 25, 2017 (announced) July 11, 2017 (launched) | 
| Release Price | $11722.00 | 
| Shop | Amazon | 
| General Specs | |
| Family | Xeon Platinum | 
| Series | 8000 | 
| Frequency | 2,100 MHz | 
| Turbo Frequency | 3,800 MHz (1 core) | 
| Clock multiplier | 21 | 
| CPUID | 0x50654 | 
| Microarchitecture | |
| ISA | x86-64 (x86) | 
| Microarchitecture | Skylake (server) | 
| Platform | Purley | 
| Chipset | Lewisburg | 
| Core Name | Skylake SP | 
| Core Family | 6 | 
| Core Stepping | H0 | 
| Process | 14 nm | 
| Technology | CMOS | 
| Word Size | 64 bit | 
| Cores | 28 | 
| Threads | 56 | 
| Max Memory | 1,536 GiB | 
| Multiprocessing | |
| Max SMP | 8-Way (Multiprocessor) | 
| Interconnect | UPI | 
| Interconnect Links | 3 | 
| Interconnect Rate | 10.4 GT/s | 
| Electrical | |
| TDP | 165 W | 
| Tcase | 0 °C – 89 °C | 
| TDTS | 0 °C – 97 °C | 
| Packaging | |
| Package | FCLGA-3647 (FCLGA) | 
| Dimension | 76.16 mm × 56.6 mm | 
| Pitch | 0.8585 mm × 0.9906 mm | 
| Contacts | 3647 | 
| Socket | Socket P, LGA-3647 | 
| Succession | |
Xeon Platinum 8176M is a 64-bit 28-core x86 multi-socket highest performance server microprocessor introduced by Intel in mid-2017. This chip supports up to 8-way multiprocessing. The Platinum 8176M, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm+ process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 2.1 GHz with a TDP of 165 W and a turbo boost frequency of up to 3.8 GHz, supports up 1.5 TiB of hexa-channel DDR4-2666 ECC memory.
As indicated by the M suffix, this specific model supports double the memory capacity for up to 1.5 TiB per socket.
Cache[edit]
- Main article: Skylake § Cache
|  | Cache Organization  Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. | ||||||||||||||||||||||||||||||||||||
| 
 | |||||||||||||||||||||||||||||||||||||
Memory controller[edit]
|  | Integrated Memory Controller | |||||||||||||
| 
 | ||||||||||||||
Expansions[edit]
|  | Expansion Options | |||||||
| 
 | ||||||||
Features[edit]
[Edit/Modify Supported Features]
|  | Supported x86 Extensions & Processor Features | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 
 
 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Frequencies[edit]
- See also: Intel's CPU Frequency Behavior
| Mode | Base | Turbo Frequency/Active Cores | |||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | ||
| Normal | 2,100 MHz | 3,800 MHz | 3,800 MHz | 3,600 MHz | 3,600 MHz | 3,500 MHz | 3,500 MHz | 3,500 MHz | 3,500 MHz | 3,500 MHz | 3,500 MHz | 3,500 MHz | 3,500 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,100 MHz | 3,100 MHz | 3,100 MHz | 3,100 MHz | 2,900 MHz | 2,900 MHz | 2,900 MHz | 2,900 MHz | 2,800 MHz | 2,800 MHz | 2,800 MHz | 2,800 MHz | 
| AVX2 | 1,700 MHz | 3,600 MHz | 3,600 MHz | 3,400 MHz | 3,400 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 2,900 MHz | 2,900 MHz | 2,900 MHz | 2,900 MHz | 2,700 MHz | 2,700 MHz | 2,700 MHz | 2,700 MHz | 2,500 MHz | 2,500 MHz | 2,500 MHz | 2,500 MHz | 2,400 MHz | 2,400 MHz | 2,400 MHz | 2,400 MHz | 
| AVX512 | 1,300 MHz | 3,500 MHz | 3,500 MHz | 3,300 MHz | 3,300 MHz | 3,000 MHz | 3,000 MHz | 3,000 MHz | 3,000 MHz | 2,600 MHz | 2,600 MHz | 2,600 MHz | 2,600 MHz | 2,300 MHz | 2,300 MHz | 2,300 MHz | 2,300 MHz | 2,100 MHz | 2,100 MHz | 2,100 MHz | 2,100 MHz | 2,000 MHz | 2,000 MHz | 2,000 MHz | 2,000 MHz | 1,900 MHz | 1,900 MHz | 1,900 MHz | 1,900 MHz | 
Facts about "Xeon Platinum 8176M  - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Platinum 8176M - Intel#io + | 
| base frequency | 2,100 MHz (2.1 GHz, 2,100,000 kHz) + | 
| chipset | Lewisburg + | 
| clock multiplier | 21 + | 
| core count | 28 + | 
| core family | 6 + | 
| core name | Skylake SP + | 
| core stepping | H0 + | 
| cpuid | 0x50654 + | 
| designer | Intel + | 
| family | Xeon Platinum + | 
| first announced | April 25, 2017 + | 
| first launched | July 11, 2017 + | 
| full page name | intel/xeon platinum/8176m + | 
| has advanced vector extensions | true + | 
| has advanced vector extensions 2 | true + | 
| has advanced vector extensions 512 | true + | 
| has ecc memory support | true + | 
| has extended page tables support | true + | 
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions + | 
| has intel enhanced speedstep technology | true + | 
| has intel speed shift technology | true + | 
| has intel trusted execution technology | true + | 
| has intel turbo boost technology 2 0 | true + | 
| has intel vpro technology | true + | 
| has intel vt-d technology | true + | 
| has intel vt-x technology | true + | 
| has second level address translation support | true + | 
| has simultaneous multithreading | true + | 
| has transactional synchronization extensions | true + | 
| has x86 advanced encryption standard instruction set extension | true + | 
| instance of | microprocessor + | 
| isa | x86-64 + | 
| isa family | x86 + | 
| l1$ size | 1,792 KiB (1,835,008 B, 1.75 MiB) + | 
| l1d$ description | 8-way set associative + | 
| l1d$ size | 896 KiB (917,504 B, 0.875 MiB) + | 
| l1i$ description | 8-way set associative + | 
| l1i$ size | 896 KiB (917,504 B, 0.875 MiB) + | 
| l2$ description | 16-way set associative + | 
| l2$ size | 28 MiB (28,672 KiB, 29,360,128 B, 0.0273 GiB) + | 
| l3$ description | 11-way set associative + | 
| l3$ size | 38.5 MiB (39,424 KiB, 40,370,176 B, 0.0376 GiB) + | 
| ldate | July 11, 2017 + | 
| main image |  + | 
| manufacturer | Intel + | 
| market segment | Server + | 
| max case temperature | 362.15 K (89 °C, 192.2 °F, 651.87 °R) + | 
| max cpu count | 8 + | 
| max dts temperature | 97 °C + | 
| max memory | 1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) + | 
| max memory bandwidth | 119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) + | 
| max memory channels | 6 + | 
| max pcie lanes | 48 + | 
| microarchitecture | Skylake (server) + | 
| min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + | 
| min dts temperature | 0 °C + | 
| model number | 8176M + | 
| name | Xeon Platinum 8176M + | 
| package | FCLGA-3647 + | 
| part number | CD8067303133605 + | 
| platform | Purley + | 
| process | 14 nm (0.014 μm, 1.4e-5 mm) + | 
| release price | $ 11,722.00 (€ 10,549.80, £ 9,494.82, ¥ 1,211,234.26) + | 
| s-spec | SR37U + | 
| s-spec (qs) | QM7R + | 
| series | 8000 + | 
| smp interconnect | UPI + | 
| smp interconnect links | 3 + | 
| smp interconnect rate | 10.4 GT/s + | 
| smp max ways | 8 + | 
| socket | Socket P + and LGA-3647 + | 
| supported memory type | DDR4-2666 + | 
| tdp | 165 W (165,000 mW, 0.221 hp, 0.165 kW) + | 
| technology | CMOS + | 
| thread count | 56 + | 
| turbo frequency (1 core) | 3,800 MHz (3.8 GHz, 3,800,000 kHz) + | 
| word size | 64 bit (8 octets, 16 nibbles) + |