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Difference between revisions of "intel/xeon gold/6152"
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{{intel title|Xeon Gold 6152}}
 
{{intel title|Xeon Gold 6152}}
−
{{mpu
+
{{chip
−
|future=Yes
 
 
|name=Xeon Gold 6152
 
|name=Xeon Gold 6152
−
|no image=Yes
 
 
|image=skylake sp (basic).png
 
|image=skylake sp (basic).png
 
|designer=Intel
 
|designer=Intel
Line 11: Line 9:
 
|part number 2=CD8067303406000
 
|part number 2=CD8067303406000
 
|s-spec=SR3B4
 
|s-spec=SR3B4
 +
|s-spec qs=QMRZ
 
|market=Server
 
|market=Server
 
|first announced=April 25, 2017
 
|first announced=April 25, 2017
Line 16: Line 15:
 
|release price=$3655.00
 
|release price=$3655.00
 
|family=Xeon Gold
 
|family=Xeon Gold
−
|series=6000
+
|series=6100
 
|locked=Yes
 
|locked=Yes
 
|frequency=2,100 MHz
 
|frequency=2,100 MHz
 
|turbo frequency1=3,700 MHz
 
|turbo frequency1=3,700 MHz
 
|clock multiplier=21
 
|clock multiplier=21
 +
|cpuid=0x50654
 
|isa=x86-64
 
|isa=x86-64
 
|isa family=x86
 
|isa family=x86
−
|microarch=Skylake
+
|microarch=Skylake (server)
 
|platform=Purley
 
|platform=Purley
 
|chipset=Lewisburg
 
|chipset=Lewisburg
Line 31: Line 31:
 
|process=14 nm
 
|process=14 nm
 
|technology=CMOS
 
|technology=CMOS
−
|die area=<!-- XX mm² -->
 
 
|word size=64 bit
 
|word size=64 bit
 
|core count=22
 
|core count=22
 
|thread count=44
 
|thread count=44
 +
|max memory=768 GiB
 
|max cpus=4
 
|max cpus=4
−
|max memory=768 GiB
+
|smp interconnect=UPI
−
|v core tolerance=<!-- OR ... -->
+
|smp interconnect links=3
−
|v io 2=<!-- OR ... -->
+
|smp interconnect rate=10.4 GT/s
 
|tdp=140 W
 
|tdp=140 W
−
|temp min=<!-- use TJ/TC whenever possible instead -->
 
−
|tjunc min=<!-- .. °C -->
 
 
|tcase min=0 °C
 
|tcase min=0 °C
 
|tcase max=92 °C
 
|tcase max=92 °C
−
|package module 1={{packages/intel/fclga-3647}}
+
|dts min=0 °C
−
|package module 2=<!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE -------------->
+
|dts max=98  °C
−
|turbo frequency=Yes
+
|package name 1=intel,fclga_3647
 +
|successor=Xeon Gold 6252
 +
|successor link=intel/xeon_gold/6252
 
}}
 
}}
−
'''Xeon Gold 6152''' is a {{arch|64}} [[x86]] high-performance server [[docosa-core]] [[multiprocessor]] set to be introduced by [[Intel]] in the second quarter of 2017. This processor is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture (a {{intel|Skylake SP|l=core}} core) and is manufactured on Intel's [[14 nm process]]. The 6152 operates at 2.1 GHz with a TDP of 140 W and a {{intel|Turbo Boost|turbo frequency}} of 3.7 GHz.
+
'''Xeon Gold 6152''' is a {{arch|64}} [[22-core]] [[x86]] multi-socket high performance server microprocessor introduced by [[Intel]] in mid-2017. This chip supports up to 4-way multiprocessing. The Gold 6152, which is based on the server configuration of the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2.1 GHz with a TDP of 140 W and a {{intel|turbo boost}} frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.
−
 
 
−
 
 
−
{{unknown features}}
 
  
 
== Cache ==
 
== Cache ==
−
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
+
{{main|intel/microarchitectures/skylake_(server)#Memory_Hierarchy|l1=Skylake § Cache}}
 
{{cache size
 
{{cache size
 
|l1 cache=1.375 MiB
 
|l1 cache=1.375 MiB
Line 78: Line 75:
 
|type=DDR4-2666
 
|type=DDR4-2666
 
|ecc=Yes
 
|ecc=Yes
−
|max mem=
+
|max mem=768 GiB
−
|controllers=1
+
|controllers=2
 
|channels=6
 
|channels=6
 
|max bandwidth=119.21 GiB/s
 
|max bandwidth=119.21 GiB/s
−
|bandwidth schan=19.89 GiB/s
+
|bandwidth schan=19.87 GiB/s
−
|bandwidth dchan=39.72 GiB/s
+
|bandwidth dchan=39.74 GiB/s
 
|bandwidth qchan=79.47 GiB/s
 
|bandwidth qchan=79.47 GiB/s
 
|bandwidth hchan=119.21 GiB/s
 
|bandwidth hchan=119.21 GiB/s
 +
}}
 +
 +
== Expansions ==
 +
{{expansions
 +
| pcie revision      = 3.0
 +
| pcie lanes        = 48
 +
| pcie config        = x16
 +
| pcie config 2      = x8
 +
| pcie config 3      = x4
 
}}
 
}}
  
Line 109: Line 115:
 
|avx=Yes
 
|avx=Yes
 
|avx2=Yes
 
|avx2=Yes
−
 
+
|avx512f=Yes
 +
|avx512cd=Yes
 +
|avx512er=No
 +
|avx512pf=No
 +
|avx512bw=Yes
 +
|avx512dq=Yes
 +
|avx512vl=Yes
 +
|avx512ifma=No
 +
|avx512vbmi=No
 +
|avx5124fmaps=No
 +
|avx5124vnniw=No
 +
|avx512vpopcntdq=No
 
|abm=Yes
 
|abm=Yes
 
|tbm=No
 
|tbm=No
Line 124: Line 141:
 
|f16c=Yes
 
|f16c=Yes
 
|tbt1=No
 
|tbt1=No
−
|tbt2=No
+
|tbt2=Yes
 
|tbmt3=No
 
|tbmt3=No
 
|bpt=No
 
|bpt=No
 
|eist=Yes
 
|eist=Yes
−
|sst=No
+
|sst=Yes
 
|flex=No
 
|flex=No
 
|fastmem=No
 
|fastmem=No
 +
|ivmd=Yes
 +
|intelnodecontroller=Yes
 +
|intelnode=Yes
 +
|kpt=Yes
 +
|ptt=Yes
 +
|intelrunsure=Yes
 +
|mbe=Yes
 
|isrt=No
 
|isrt=No
 
|sba=No
 
|sba=No
Line 138: Line 162:
 
|ipt=No
 
|ipt=No
 
|tsx=Yes
 
|tsx=Yes
−
|txt=No
+
|txt=Yes
 
|ht=Yes
 
|ht=Yes
 
|vpro=Yes
 
|vpro=Yes
Line 144: Line 168:
 
|vtd=Yes
 
|vtd=Yes
 
|ept=Yes
 
|ept=Yes
−
|mpx=Yes
+
|mpx=No
 
|sgx=No
 
|sgx=No
 
|securekey=No
 
|securekey=No
−
|osguard=Yes
+
|osguard=No
 
|3dnow=No
 
|3dnow=No
 
|e3dnow=No
 
|e3dnow=No
Line 154: Line 178:
 
|amdvi=No
 
|amdvi=No
 
|amdv=No
 
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 
|rvi=No
 
|rvi=No
 
|smt=No
 
|smt=No
Line 159: Line 186:
 
|xfr=No
 
|xfr=No
 
}}
 
}}
 +
 +
== Frequencies ==
 +
{{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}}
 +
{{frequency table
 +
|freq_base=2,100 MHz
 +
|freq_1=3,700 MHz
 +
|freq_2=3,700 MHz
 +
|freq_3=3,500 MHz
 +
|freq_4=3,500 MHz
 +
|freq_5=3,400 MHz
 +
|freq_6=3,400 MHz
 +
|freq_7=3,400 MHz
 +
|freq_8=3,400 MHz
 +
|freq_9=3,400 MHz
 +
|freq_10=3,400 MHz
 +
|freq_11=3,400 MHz
 +
|freq_12=3,400 MHz
 +
|freq_13=3,100 MHz
 +
|freq_14=3,100 MHz
 +
|freq_15=3,100 MHz
 +
|freq_16=3,100 MHz
 +
|freq_17=2,900 MHz
 +
|freq_18=2,900 MHz
 +
|freq_19=2,900 MHz
 +
|freq_20=2,900 MHz
 +
|freq_21=2,800 MHz
 +
|freq_22=2,800 MHz
 +
|freq_avx2_base=1,700 MHz
 +
|freq_avx2_1=3,600 MHz
 +
|freq_avx2_2=3,600 MHz
 +
|freq_avx2_3=3,400 MHz
 +
|freq_avx2_4=3,400 MHz
 +
|freq_avx2_5=3,300 MHz
 +
|freq_avx2_6=3,300 MHz
 +
|freq_avx2_7=3,300 MHz
 +
|freq_avx2_8=3,300 MHz
 +
|freq_avx2_9=3,000 MHz
 +
|freq_avx2_10=3,000 MHz
 +
|freq_avx2_11=3,000 MHz
 +
|freq_avx2_12=3,000 MHz
 +
|freq_avx2_13=2,700 MHz
 +
|freq_avx2_14=2,700 MHz
 +
|freq_avx2_15=2,700 MHz
 +
|freq_avx2_16=2,700 MHz
 +
|freq_avx2_17=2,400 MHz
 +
|freq_avx2_18=2,400 MHz
 +
|freq_avx2_19=2,400 MHz
 +
|freq_avx2_20=2,400 MHz
 +
|freq_avx2_21=2,400 MHz
 +
|freq_avx2_22=2,400 MHz
 +
|freq_avx512_base=1,400 MHz
 +
|freq_avx512_1=3,500 MHz
 +
|freq_avx512_2=3,500 MHz
 +
|freq_avx512_3=3,300 MHz
 +
|freq_avx512_4=3,300 MHz
 +
|freq_avx512_5=2,900 MHz
 +
|freq_avx512_6=2,900 MHz
 +
|freq_avx512_7=2,900 MHz
 +
|freq_avx512_8=2,900 MHz
 +
|freq_avx512_9=2,500 MHz
 +
|freq_avx512_10=2,500 MHz
 +
|freq_avx512_11=2,500 MHz
 +
|freq_avx512_12=2,500 MHz
 +
|freq_avx512_13=2,200 MHz
 +
|freq_avx512_14=2,200 MHz
 +
|freq_avx512_15=2,200 MHz
 +
|freq_avx512_16=2,200 MHz
 +
|freq_avx512_17=2,000 MHz
 +
|freq_avx512_18=2,000 MHz
 +
|freq_avx512_19=2,000 MHz
 +
|freq_avx512_20=2,000 MHz
 +
|freq_avx512_21=2,000 MHz
 +
|freq_avx512_22=2,000 MHz
 +
}}
 +
 +
== Benchmarks ==
 +
{{benchmarks main
 +
|
 +
{{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00358.html|test_timestamp=2017-10-16 01:45:46-0400|chip_count=2|core_count=44|copies_count=88|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)|SPECrate2017_int_base=210|SPECrate2017_int_peak=}}
 +
{{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00359.html|test_timestamp=2017-10-12 05:59:17-0400|chip_count=2|core_count=44|thread_count=44|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)|SPECspeed2017_fp_base=114|SPECspeed2017_fp_peak=}}
 +
{{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00360.html|test_timestamp=2017-10-16 07:22:47-0400|chip_count=2|core_count=44|copies_count=88|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)|SPECrate2017_fp_base=197|SPECrate2017_fp_peak=}}
 +
{{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00478.html|test_timestamp=2017-10-12 02:57:28-0400|chip_count=2|core_count=44|thread_count=44|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)|SPECspeed2017_int_base=8.89|SPECspeed2017_int_peak=}}
 +
}}
 +
 +
[[Category:microprocessor models by intel based on skylake extreme core count die]]

Latest revision as of 00:46, 29 December 2019

Edit Values
Xeon Gold 6152
skylake sp (basic).png
General Info
DesignerIntel
ManufacturerIntel
Model Number6152
Part NumberBX806736152,
CD8067303406000
S-SpecSR3B4
QMRZ (QS)
MarketServer
IntroductionApril 25, 2017 (announced)
July 11, 2017 (launched)
Release Price$3655.00
ShopAmazon
General Specs
FamilyXeon Gold
Series6100
LockedYes
Frequency2,100 MHz
Turbo Frequency3,700 MHz (1 core)
Clock multiplier21
CPUID0x50654
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSkylake (server)
PlatformPurley
ChipsetLewisburg
Core NameSkylake SP
Core Family6
Core SteppingH0
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores22
Threads44
Max Memory768 GiB
Multiprocessing
Max SMP4-Way (Multiprocessor)
InterconnectUPI
Interconnect Links3
Interconnect Rate10.4 GT/s
Electrical
TDP140 W
Tcase0 °C – 92 °C
TDTS0 °C – 98 °C
Packaging
PackageFCLGA-3647 (FCLGA)
Dimension76.16 mm × 56.6 mm
Pitch0.8585 mm × 0.9906 mm
Contacts3647
SocketSocket P, LGA-3647
Succession

Xeon Gold 6152 is a 64-bit 22-core x86 multi-socket high performance server microprocessor introduced by Intel in mid-2017. This chip supports up to 4-way multiprocessing. The Gold 6152, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm+ process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 2.1 GHz with a TDP of 140 W and a turbo boost frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.

Cache[edit]

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$1.375 MiB
1,408 KiB
1,441,792 B
L1I$704 KiB
720,896 B
0.688 MiB
22x32 KiB8-way set associative 
L1D$704 KiB
720,896 B
0.688 MiB
22x32 KiB8-way set associativewrite-back
L2$22 MiB
22,528 KiB
23,068,672 B
0.0215 GiB
  22x1 MiB16-way set associativewrite-back
L3$30.25 MiB
30,976 KiB
31,719,424 B
0.0295 GiB
  22x1.375 MiB11-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2666
Supports ECCYes
Max Mem768 GiB
Controllers2
Channels6
Max Bandwidth119.21 GiB/s
122,071.04 MiB/s
128.001 GB/s
128,000.763 MB/s
0.116 TiB/s
0.128 TB/s
Bandwidth
Single 19.87 GiB/s
Double 39.74 GiB/s
Quad 79.47 GiB/s
Hexa 119.21 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes48
Configsx16, x8, x4


Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
AVX-512Advanced Vector 512-bit
AVX512FAVX-512 Foundation
AVX512CDAVX-512 Conflict Detection
AVX512BWAVX-512 Byte and Word
AVX512DQAVX-512 Doubleword and Quadword Instructions
AVX512VLAVX-512 Vector Length
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
SSTSpeed Shift Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
VMDVolume Management Device
NMNode Manager
KPTKey Protection Technology
PTTPlatform Trust Technology
Run SureRun Sure Technology (RAS Capability)
MBE CtrlMode-Based Execute Control
Node CtrlrNode Controller Support

Frequencies[edit]

See also: Intel's CPU Frequency Behavior

[Modify Frequency Info]

ModeBaseTurbo Frequency/Active Cores
12345678910111213141516171819202122
Normal2,100 MHz3,700 MHz3,700 MHz3,500 MHz3,500 MHz3,400 MHz3,400 MHz3,400 MHz3,400 MHz3,400 MHz3,400 MHz3,400 MHz3,400 MHz3,100 MHz3,100 MHz3,100 MHz3,100 MHz2,900 MHz2,900 MHz2,900 MHz2,900 MHz2,800 MHz2,800 MHz
AVX21,700 MHz3,600 MHz3,600 MHz3,400 MHz3,400 MHz3,300 MHz3,300 MHz3,300 MHz3,300 MHz3,000 MHz3,000 MHz3,000 MHz3,000 MHz2,700 MHz2,700 MHz2,700 MHz2,700 MHz2,400 MHz2,400 MHz2,400 MHz2,400 MHz2,400 MHz2,400 MHz
AVX5121,400 MHz3,500 MHz3,500 MHz3,300 MHz3,300 MHz2,900 MHz2,900 MHz2,900 MHz2,900 MHz2,500 MHz2,500 MHz2,500 MHz2,500 MHz2,200 MHz2,200 MHz2,200 MHz2,200 MHz2,000 MHz2,000 MHz2,000 MHz2,000 MHz2,000 MHz2,000 MHz

Benchmarks[edit]

[Edit Benchmarks]

Test: SPEC CPU2017
Tested: 2017-10-16 01:45:46-0400
Chips: 2, Cores: 44, Copies: 88
benchmarks.svg
Vendor: HPE
System: ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)
SPECrate2017_int_base: 210
Test: SPEC CPU2017
Tested: 2017-10-12 05:59:17-0400
Chips: 2, Cores: 44, Threads: 44
benchmarks.svg
Vendor: HPE
System: ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)
SPECspeed2017_fp_base: 114
Test: SPEC CPU2017
Tested: 2017-10-16 07:22:47-0400
Chips: 2, Cores: 44, Copies: 88
benchmarks.svg
Vendor: HPE
System: ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)
SPECrate2017_fp_base: 197
Test: SPEC CPU2017
Tested: 2017-10-12 02:57:28-0400
Chips: 2, Cores: 44, Threads: 44
benchmarks.svg
Vendor: HPE
System: ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6152)
SPECspeed2017_int_base: 8.89
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_gold/6152&oldid=95150"
Facts about "Xeon Gold 6152 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon Gold 6152 - Intel#io +, Xeon Gold 6152 - Intel +, Xeon Gold 6152 - Intel +, Xeon Gold 6152 - Intel + and Xeon Gold 6152 - Intel +
base frequency2,100 MHz (2.1 GHz, 2,100,000 kHz) +
chipsetLewisburg +
clock multiplier21 +
core count22 +
core family6 +
core nameSkylake SP +
core steppingH0 +
cpuid0x50654 +
designerIntel +
familyXeon Gold +
first announcedApril 25, 2017 +
first launchedJuly 11, 2017 +
full page nameintel/xeon gold/6152 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has advanced vector extensions 512true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions +
has intel enhanced speedstep technologytrue +
has intel speed shift technologytrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size1,408 KiB (1,441,792 B, 1.375 MiB) +
l1d$ description8-way set associative +
l1d$ size704 KiB (720,896 B, 0.688 MiB) +
l1i$ description8-way set associative +
l1i$ size704 KiB (720,896 B, 0.688 MiB) +
l2$ description16-way set associative +
l2$ size22 MiB (22,528 KiB, 23,068,672 B, 0.0215 GiB) +
l3$ description11-way set associative +
l3$ size30.25 MiB (30,976 KiB, 31,719,424 B, 0.0295 GiB) +
ldateJuly 11, 2017 +
main imageFile:skylake sp (basic).png +
manufacturerIntel +
market segmentServer +
max case temperature365.15 K (92 °C, 197.6 °F, 657.27 °R) +
max cpu count4 +
max dts temperature98 °C +
max memory786,432 MiB (805,306,368 KiB, 824,633,720,832 B, 768 GiB, 0.75 TiB) +
max memory bandwidth119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) +
max memory channels6 +
max pcie lanes48 +
microarchitectureSkylake (server) +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min dts temperature0 °C +
model number6152 +
nameXeon Gold 6152 +
packageFCLGA-3647 +
part numberBX806736152 + and CD8067303406000 +
platformPurley +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 3,655.00 (€ 3,289.50, £ 2,960.55, ¥ 377,671.15) +
s-specSR3B4 +
s-spec (qs)QMRZ +
series6100 +
smp interconnectUPI +
smp interconnect links3 +
smp interconnect rate10.4 GT/s +
smp max ways4 +
socketSocket P + and LGA-3647 +
supported memory typeDDR4-2666 +
tdp140 W (140,000 mW, 0.188 hp, 0.14 kW) +
technologyCMOS +
thread count44 +
turbo frequency (1 core)3,700 MHz (3.7 GHz, 3,700,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +