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Difference between revisions of "intel/xeon e/e-2224"
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{{intel title|Xeon E-2224}}
 
{{intel title|Xeon E-2224}}
 
{{chip
 
{{chip
−
|future=Yes
 
 
|name=Xeon E-2224
 
|name=Xeon E-2224
 
|image=coffee lake e (front).png
 
|image=coffee lake e (front).png
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|tjunc min=0 °C
 
|tjunc min=0 °C
 
|tjunc max=100 °C
 
|tjunc max=100 °C
 +
|tcase min=0 °C
 +
|tcase max=69.3 °C
 
|package name 1=intel,fclga_1151
 
|package name 1=intel,fclga_1151
 
|predecessor=Xeon E-2124
 
|predecessor=Xeon E-2124
 
|predecessor link=intel/xeon_e/e-2124
 
|predecessor link=intel/xeon_e/e-2124
 
}}
 
}}
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'''Xeon E-2224''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] workstation microprocessor set to be introduced by [[Intel]] in early [[2019]]. This processor, which is based on the {{intel|Coffee Lake|l=arch}} microarchitecture, is manufactured on Intel's 3rd generation enhanced [[14 nm process|14nm++ process]]. The E-2224 operates at 3.4 GHz with a TDP of ? W and a {{intel|turbo boost}} of up to ? GHz. This chip supports up to 64 GiB of dual-channel DDR4-2666 memory.
+
'''Xeon E-2224''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] workstation microprocessor introduced by [[Intel]] in early [[2019]]. This processor, which is based on the {{intel|Coffee Lake|l=arch}} microarchitecture, is manufactured on Intel's 3rd generation enhanced [[14 nm process|14nm++ process]]. The E-2224 operates at 3.4 GHz with a TDP of 71 W and a {{intel|turbo boost}} of up to 4.6 GHz. This chip supports up to 128 GiB of dual-channel DDR4-2666 memory.
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|type=DDR4-2666
 
|type=DDR4-2666
 
|ecc=Yes
 
|ecc=Yes
−
|max mem=64 GiB
+
|max mem=128 GiB
 
|controllers=1
 
|controllers=1
 
|channels=2
 
|channels=2
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|avx512vbmi=No
 
|avx512vbmi=No
 
|avx5124fmaps=No
 
|avx5124fmaps=No
 +
|avx512vnni=No
 
|avx5124vnniw=No
 
|avx5124vnniw=No
 
|avx512vpopcntdq=No
 
|avx512vpopcntdq=No
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|clmul=Yes
 
|clmul=Yes
 
|f16c=Yes
 
|f16c=Yes
 +
|bfloat16=No
 
|tbt1=No
 
|tbt1=No
 
|tbt2=Yes
 
|tbt2=Yes
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|osguard=Yes
 
|osguard=Yes
 
|intqat=No
 
|intqat=No
 +
|dlboost=No
 
|3dnow=No
 
|3dnow=No
 
|e3dnow=No
 
|e3dnow=No

Latest revision as of 08:14, 2 June 2019

Edit Values
Xeon E-2224
coffee lake e (front).png
General Info
DesignerIntel
ManufacturerIntel
Model NumberE-2224
Part NumberCM8068404174707
S-SpecSRFAV
MarketWorkstation, Server
IntroductionMay 27, 2019 (announced)
May 27, 2019 (launched)
Release Price$193.00 (tray)
ShopAmazon
General Specs
FamilyXeon E
SeriesE-2200
LockedYes
Frequency3,400 MHz
Turbo Frequency4,600 MHz (1 core)
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Clock multiplier34
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureCoffee Lake
PlatformMehlow
ChipsetCannon Point
Core NameCoffee Lake ER
Core Family6
Core SteppingU0
Process14 nm
TechnologyCMOS
Die126 mm²
Word Size64 bit
Cores4
Threads4
Max Memory128 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP71 W
Tjunction0 °C – 100 °C
Tcase0 °C – 69.3 °C
Packaging
PackageFCLGA-1151, FCLGA14C (LGA)
Dimension37.5 mm × 37.5 mm × 4.4 mm
Pitch0.914 mm
Contacts1151
SocketSocket H4, LGA-1151
Succession

Xeon E-2224 is a 64-bit quad-core high-end performance x86 workstation microprocessor introduced by Intel in early 2019. This processor, which is based on the Coffee Lake microarchitecture, is manufactured on Intel's 3rd generation enhanced 14nm++ process. The E-2224 operates at 3.4 GHz with a TDP of 71 W and a turbo boost of up to 4.6 GHz. This chip supports up to 128 GiB of dual-channel DDR4-2666 memory.


Cache[edit]

Main article: Coffee Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB16-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2666
Supports ECCYes
Max Mem128 GiB
Controllers1
Channels2
Max Bandwidth39.74 GiB/s
40,693.76 MiB/s
42.671 GB/s
42,670.5 MB/s
0.0388 TiB/s
0.0427 TB/s
Bandwidth
Single 19.87 GiB/s
Double 39.74 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 16
Configuration: 1x16, 2x8, 1x8+2x4


Graphics[edit]

This processor has no integrated graphics processor.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e/e-2224&oldid=91497"
Facts about "Xeon E-2224 - Intel"
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Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon E-2224 - Intel#pcie +
base frequency3,400 MHz (3.4 GHz, 3,400,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
chipsetCannon Point +
clock multiplier34 +
core count4 +
core family6 +
core nameCoffee Lake ER +
core steppingU0 +
designerIntel +
die area126 mm² (0.195 in², 1.26 cm², 126,000,000 µm²) +
familyXeon E +
first announcedMay 27, 2019 +
first launchedMay 27, 2019 +
full page nameintel/xeon e/e-2224 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology + and OS Guard +
has intel enhanced speedstep technologytrue +
has intel secure key technologytrue +
has intel supervisor mode execution protectiontrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description16-way set associative +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldateMay 27, 2019 +
main imageFile:coffee lake e (front).png +
manufacturerIntel +
market segmentWorkstation + and Server +
max case temperature342.45 K (69.3 °C, 156.74 °F, 616.41 °R) +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth39.74 GiB/s (40,693.76 MiB/s, 42.671 GB/s, 42,670.5 MB/s, 0.0388 TiB/s, 0.0427 TB/s) +
max memory channels2 +
microarchitectureCoffee Lake +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model numberE-2224 +
nameXeon E-2224 +
packageFCLGA-1151 + and FCLGA14C +
part numberCM8068404174707 +
platformMehlow +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 193.00 (€ 173.70, £ 156.33, ¥ 19,942.69) +
release price (tray)$ 193.00 (€ 173.70, £ 156.33, ¥ 19,942.69) +
s-specSRFAV +
seriesE-2200 +
smp max ways1 +
socketSocket H4 + and LGA-1151 +
supported memory typeDDR4-2666 +
tdp71 W (71,000 mW, 0.0952 hp, 0.071 kW) +
technologyCMOS +
thread count4 +
turbo frequency (1 core)4,600 MHz (4.6 GHz, 4,600,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +