From WikiChip
Difference between revisions of "intel/xeon d/d-1518"
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== Expansions == | == Expansions == | ||
− | {{expansions | + | {{expansions main |
− | | | + | | |
− | | pcie revision | + | {{expansions entry |
− | | pcie lanes | + | |type=PCIe |
− | | pcie | + | |pcie revision=3.0 |
− | | pcie config | + | |pcie lanes=24 |
− | | pcie config | + | |pcie config=x16 |
− | | pcie config 2 | + | |pcie config 2=x8 |
− | | usb revision | + | |pcie config 3=x4 |
− | | usb revision 2 | + | }} |
− | | usb ports | + | {{expansions entry |
− | | | + | |type=PCIe |
− | | | + | |pcie revision=2.0 |
− | | | + | |pcie lanes=8 |
+ | |pcie config=x8 | ||
+ | |pcie config 2=x4 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=USB | ||
+ | |usb revision=3.0 | ||
+ | |usb ports=4 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=USB | ||
+ | |usb revision=2.0 | ||
+ | |usb ports=4 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=SATA | ||
+ | |sata revision=3 | ||
+ | |sata ports=6 | ||
+ | }} | ||
}} | }} | ||
== Networking == | == Networking == | ||
− | {{ | + | {{network |
− | | | + | |eth opts=Yes |
− | | | + | |10ge=Yes |
− | + | |10ge ports=2 | |
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}} | }} | ||
== Features == | == Features == | ||
{{x86 features | {{x86 features | ||
− | |real= | + | |real=Yes |
− | |protected= | + | |protected=Yes |
− | |smm= | + | |smm=Yes |
− | |fpu= | + | |fpu=Yes |
− | |x8616= | + | |x8616=Yes |
− | |x8632= | + | |x8632=Yes |
− | |x8664= | + | |x8664=Yes |
|nx=Yes | |nx=Yes | ||
|mmx=Yes | |mmx=Yes | ||
− | |emmx= | + | |emmx=Yes |
|sse=Yes | |sse=Yes | ||
|sse2=Yes | |sse2=Yes | ||
|sse3=Yes | |sse3=Yes | ||
|ssse3=Yes | |ssse3=Yes | ||
− | |sse41= | + | |sse41=Yes |
− | |sse42= | + | |sse42=Yes |
|sse4a=No | |sse4a=No | ||
|avx=Yes | |avx=Yes | ||
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|avx512vbmi=No | |avx512vbmi=No | ||
|avx5124fmaps=No | |avx5124fmaps=No | ||
+ | |avx512vnni=No | ||
|avx5124vnniw=No | |avx5124vnniw=No | ||
|avx512vpopcntdq=No | |avx512vpopcntdq=No | ||
− | |abm= | + | |abm=Yes |
|tbm=No | |tbm=No | ||
|bmi1=Yes | |bmi1=Yes | ||
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|fma4=No | |fma4=No | ||
|aes=Yes | |aes=Yes | ||
− | |rdrand= | + | |rdrand=Yes |
|sha=No | |sha=No | ||
|xop=No | |xop=No | ||
− | |adx= | + | |adx=Yes |
− | |clmul= | + | |clmul=Yes |
|f16c=Yes | |f16c=Yes | ||
+ | |bfloat16=No | ||
|tbt1=No | |tbt1=No | ||
|tbt2=No | |tbt2=No | ||
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|mpx=No | |mpx=No | ||
|sgx=No | |sgx=No | ||
− | |securekey= | + | |securekey=Yes |
− | |osguard= | + | |osguard=Yes |
|intqat=No | |intqat=No | ||
+ | |dlboost=No | ||
|3dnow=No | |3dnow=No | ||
|e3dnow=No | |e3dnow=No |
Latest revision as of 01:21, 1 April 2019
Edit Values | |
Xeon D-1518 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | D-1518 |
Part Number | GG8067402569700 |
S-Spec | SR2DN |
Market | Server, Embedded |
Introduction | March 9, 2015 (announced) March 9, 2015 (launched) |
Release Price | $193.00 (tray) |
Shop | Amazon |
General Specs | |
Family | Xeon D |
Series | D-1500 |
Locked | Yes |
Frequency | 2,200 MHz |
Bus type | DMI 2.0 |
Clock multiplier | 22 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Broadwell |
Platform | Grangeville |
Core Name | Broadwell DE |
Core Family | 6 |
Core Model | 6 |
Core Stepping | V2 |
Process | 14 nm |
Transistors | 3,200,000,000 |
Technology | CMOS |
Die | 246.24 mm² |
Word Size | 64 bit |
Cores | 4 |
Threads | 8 |
Max Memory | 128 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 35 W |
OP Temperature | 0 °C – 108 °C |
Packaging | |
Package | FCBGA-1667 (FCBGA) |
Dimension | 37.5 mm × 37.5 mm × 3.557 mm |
Pitch | 0.7 mm |
Contacts | 1667 |
Xeon D-1518 is a 64-bit quad-core x86 microserver SoC introduced by Intel in late 2015. The D-1518 is based on the Broadwell microarchitecture and is fabricated on their 14 nm process. It operates at 2.2 GHz with a TDP of 35 W and supports up to 128 GiB of dual-channel DDR4-2133 memory.
Cache[edit]
- Main article: Broadwell § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Graphics[edit]
This SoC has no integrated graphics processing unit.
Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options |
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Networking[edit]
Networking
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Features[edit]
[Edit/Modify Supported Features]
Facts about "Xeon D-1518 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon D-1518 - Intel#pcie + |
back image | + |
base frequency | 2,200 MHz (2.2 GHz, 2,200,000 kHz) + |
bus type | DMI 2.0 + |
clock multiplier | 22 + |
core count | 4 + |
core family | 6 + |
core model | 6 + |
core name | Broadwell DE + |
core stepping | V2 + |
designer | Intel + |
die area | 246.24 mm² (0.382 in², 2.462 cm², 246,240,000 µm²) + |
family | Xeon D + |
first announced | March 9, 2015 + |
first launched | March 9, 2015 + |
full page name | intel/xeon d/d-1518 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Secure Key Technology + and OS Guard + |
has intel enhanced speedstep technology | true + |
has intel secure key technology | true + |
has intel supervisor mode execution protection | true + |
has intel trusted execution technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) + |
ldate | March 9, 2015 + |
main image | + |
manufacturer | Intel + |
market segment | Server + and Embedded + |
max cpu count | 1 + |
max memory | 131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) + |
max memory bandwidth | 31.78 GiB/s (32,542.72 MiB/s, 34.124 GB/s, 34,123.515 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 2 + |
max operating temperature | 108 °C + |
max sata ports | 6 + |
max usb ports | 4 + |
microarchitecture | Broadwell + |
min operating temperature | 0 °C + |
model number | D-1518 + |
name | Xeon D-1518 + |
package | FCBGA-1667 + |
part number | GG8067402569700 + |
platform | Grangeville + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 193.00 (€ 173.70, £ 156.33, ¥ 19,942.69) + |
release price (tray) | $ 193.00 (€ 173.70, £ 156.33, ¥ 19,942.69) + |
s-spec | SR2DN + |
series | D-1500 + |
smp max ways | 1 + |
supported memory type | DDR4-2133 + |
tdp | 35 W (35,000 mW, 0.0469 hp, 0.035 kW) + |
technology | CMOS + |
thread count | 8 + |
transistor count | 3,200,000,000 + |
word size | 64 bit (8 octets, 16 nibbles) + |