(add stepping (kbl-r and cfl has the same CPUID, they just plus 1 stepping from the kbl)) |
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|name=Kaby Lake R | |name=Kaby Lake R | ||
|no image=Yes | |no image=Yes | ||
+ | |image=kaby lake r (front).png | ||
+ | |image size=250px | ||
+ | |caption=Package front side | ||
+ | |image 2=kaby lake r (back).png | ||
+ | |image 2 size=250px | ||
+ | |caption 2=Package back side | ||
|developer=Intel | |developer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
Line 12: | Line 18: | ||
|proc=14 nm | |proc=14 nm | ||
|tech=CMOS | |tech=CMOS | ||
+ | |clock min=1,600 MHz | ||
+ | |clock max=1,900 MHz | ||
+ | |package module 1={{packages/intel/fcbga-1356}} | ||
|predecessor=Kaby Lake U | |predecessor=Kaby Lake U | ||
|predecessor link=intel/cores/kaby lake u | |predecessor link=intel/cores/kaby lake u | ||
− | |successor= | + | |successor=Whiskey Lake U |
− | |successor link=intel/cores/ | + | |successor link=intel/cores/whiskey lake u |
+ | |successor 2=Cannon Lake U | ||
+ | |successor 2 link=intel/cores/cannon lake u | ||
}} | }} | ||
− | '''Kaby Lake R''' ('''KBL-R''') is the name of the core for [[Intel]]'s line of low-power mobile processors based on the {{intel|Kaby Lake|l=arch}} microarchitecture serving as a refresh to {{intel|Kaby Lake U|l=core}}. These chips are primarily targeted towards light notebooks and laptops, portable all-in-ones (AiOs), minis, and conference rooms. | + | '''Kaby Lake R''' ('''KBL-R''') is the name of the core for [[Intel]]'s line of low-power mobile processors based on the {{intel|Kaby Lake|l=arch}} microarchitecture serving as a refresh to {{intel|Kaby Lake U|l=core}}. These chips are primarily targeted towards light notebooks and laptops, portable all-in-ones (AiOs), minis, and conference rooms. Kaby Lake R processors are fabricated on Intel's 2nd generation enhanced [[14 nm lithography process|14nm+ process]] and feature double the core count of the previous generation. |
+ | |||
+ | Although those microprocessors are still based on {{intel|Kaby Lake|l=arch}}, Intel has branded them as 8th Generation Core. Those processors are also the first to feature quad-cores within the 15 Watt TDP class of mobile processors. | ||
== Overview == | == Overview == | ||
Line 27: | Line 40: | ||
* Dual-channel Memory | * Dual-channel Memory | ||
** Up to DDR4-2400, LPDDR3-2133 | ** Up to DDR4-2400, LPDDR3-2133 | ||
− | ** | + | ** 32 GiB |
* 12x PCIe | * 12x PCIe | ||
− | * [[ | + | * [[Quad-core]] with 8 threads |
* Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX1, AVX2) | * Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX1, AVX2) | ||
− | * Support [[AHCI]], [[High Definition Audio]], | + | * {{intel|Turbo Boost}}, {{intel|Hyper-Threading}}, {{intel|Software Guard}}, {{intel|SpeedStep}}, {{intel|Speed Shift}}, {{intel|VT-x}}/{{intel|EPT}}, {{intel|VT-d}}, {{intel|OS Guard}}, {{intel|Flex Memory}}, {{intel|My WiFi Technology}}, and {{intel|Identity Protection Technology}} |
+ | * Support [[AHCI]], [[High Definition Audio]], 6x [[USB 3.0]] ports, 10x [[USB 2.0]] ports, 4x [[SATA III]], 6x [[I2C]], 3x [[UART]], 1x [[SDXC]] | ||
* Graphics | * Graphics | ||
− | ** {{intel| | + | ** {{intel|UHD Graphics 620}} ({{intel|Gen9.5|l=arch}} GT2) |
** 3 independent displays supported | ** 3 independent displays supported | ||
− | ** Base frequency of | + | ** Base frequency of 300 MHz |
** Burst frequency of 1-1.15 GHz | ** Burst frequency of 1-1.15 GHz | ||
{{clear}} | {{clear}} | ||
+ | == Compiler support == | ||
+ | {| class="wikitable" | ||
+ | |- | ||
+ | ! Compiler !! Arch-Specific || Arch-Favorable | ||
+ | |- | ||
+ | | [[ICC]] || <code>-march=skylake</code> || <code>-mtune=skylake</code> | ||
+ | |- | ||
+ | | [[GCC]] || <code>-march=skylake</code> || <code>-mtune=skylake</code> | ||
+ | |- | ||
+ | | [[LLVM]] || <code>-march=skylake</code> || <code>-mtune=skylake</code> | ||
+ | |- | ||
+ | | [[Visual Studio]] || <code>/arch:AVX2</code> || <code>/tune:skylake</code> | ||
+ | |} | ||
+ | |||
+ | === CPUID === | ||
+ | {| class="wikitable tc1 tc2 tc3 tc4 tc5" | ||
+ | ! Core !! Extended<br>Family !! Family !! Extended<br>Model !! Model !! Stepping | ||
+ | |- | ||
+ | | rowspan="2" | {{intel|Kaby Lake R|U|l=core}} || 0 || 0x6 || 0x8 || 0xE || 0xA | ||
+ | |- | ||
+ | | colspan="5" | Family 6 Model 142 Stepping 10 | ||
+ | |} | ||
+ | |||
+ | |||
+ | == Kaby Lake R Processors == | ||
+ | <!-- NOTE: | ||
+ | This table is generated automatically from the data in the actual articles. | ||
+ | If a microprocessor is missing from the list, an appropriate article for it needs to be | ||
+ | created and tagged accordingly. | ||
+ | |||
+ | Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips | ||
+ | --> | ||
+ | {{comp table start}} | ||
+ | <table class="comptable sortable tc5 tc6"> | ||
+ | <tr class="comptable-header"><th> </th><th colspan="21">List of Kaby Lake R Processors</th></tr> | ||
+ | <tr class="comptable-header"><th> </th><th colspan="10">Main processor</th><th colspan="3">IGP</th></tr> | ||
+ | {{comp table header 1|cols=Launched, Price, Family, Cores, Threads, %L3$, %TDP, Frequency, %{{intel|turbo boost|Turbo}}, Max Mem, Name, Frequency, Turbo}} | ||
+ | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake R]] | ||
+ | |?full page name | ||
+ | |?model number | ||
+ | |?first launched | ||
+ | |?release price | ||
+ | |?microprocessor family | ||
+ | |?core count | ||
+ | |?thread count | ||
+ | |?l3$ size | ||
+ | |?tdp | ||
+ | |?base frequency#GHz | ||
+ | |?turbo frequency (1 core)#GHz | ||
+ | |?max memory#GiB | ||
+ | |?integrated gpu | ||
+ | |?integrated gpu base frequency | ||
+ | |?integrated gpu max frequency | ||
+ | |format=template | ||
+ | |template=proc table 3 | ||
+ | |searchlabel= | ||
+ | |sort=microprocessor family, model number | ||
+ | |order=asc,asc | ||
+ | |userparam=15 | ||
+ | |mainlabel=- | ||
+ | |limit=100 | ||
+ | }} | ||
+ | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake R]]}} | ||
+ | </table> | ||
+ | {{comp table end}} | ||
+ | |||
+ | == Documents == | ||
+ | * [[:File:kaby-lake-r-product-brief.pdf|Kaby Lake R Product Brief]] | ||
+ | |||
+ | == See also == | ||
+ | [[File:kaby lake r (front, angled).png|right|175px]] | ||
+ | [[File:kaby lake r (back, angled).png|right|175px]] | ||
+ | {{intel kaby lake core see also}} |
Latest revision as of 08:52, 11 February 2019
Edit Values | |||||||||||||
Kaby Lake R | |||||||||||||
Package front side | |||||||||||||
Package back side | |||||||||||||
General Info | |||||||||||||
Designer | Intel | ||||||||||||
Manufacturer | Intel | ||||||||||||
Introduction | August 21, 2017 (announced) August 21, 2017 (launched) | ||||||||||||
Microarchitecture | |||||||||||||
ISA | x86-64 | ||||||||||||
Microarchitecture | Kaby Lake | ||||||||||||
Word Size | 8 octets 64 bit16 nibbles | ||||||||||||
Process | 14 nm 0.014 μm 1.4e-5 mm | ||||||||||||
Technology | CMOS | ||||||||||||
Clock | 1,600 MHz - 1,900 MHz | ||||||||||||
Packaging | |||||||||||||
| |||||||||||||
Succession | |||||||||||||
Kaby Lake R (KBL-R) is the name of the core for Intel's line of low-power mobile processors based on the Kaby Lake microarchitecture serving as a refresh to Kaby Lake U. These chips are primarily targeted towards light notebooks and laptops, portable all-in-ones (AiOs), minis, and conference rooms. Kaby Lake R processors are fabricated on Intel's 2nd generation enhanced 14nm+ process and feature double the core count of the previous generation.
Although those microprocessors are still based on Kaby Lake, Intel has branded them as 8th Generation Core. Those processors are also the first to feature quad-cores within the 15 Watt TDP class of mobile processors.
Contents
Overview[edit]
Kaby Lake R based processors are a single-chip solution - the chipset is packaged in the same physical casing as the CPU in a multi-chip package (MCP). Unlike Kaby Lake U, there are no variations with 3 dies which incorporated an on-package cache (OPC) in addition to the hub and CPU. Communication between the separate dies are done via a lightweight On-Package Interconnect (OPI) interface, allowing for 4 GT/s transfer rate. All Kaby Lake R processors use Socket BGA-1356.
Common Features[edit]
All Kaby Lake R processors have the following:
- Dual-channel Memory
- Up to DDR4-2400, LPDDR3-2133
- 32 GiB
- 12x PCIe
- Quad-core with 8 threads
- Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX1, AVX2)
- Turbo Boost, Hyper-Threading, Software Guard, SpeedStep, Speed Shift, VT-x/EPT, VT-d, OS Guard, Flex Memory, My WiFi Technology, and Identity Protection Technology
- Support AHCI, High Definition Audio, 6x USB 3.0 ports, 10x USB 2.0 ports, 4x SATA III, 6x I2C, 3x UART, 1x SDXC
- Graphics
- UHD Graphics 620 (Gen9.5 GT2)
- 3 independent displays supported
- Base frequency of 300 MHz
- Burst frequency of 1-1.15 GHz
Compiler support[edit]
Compiler | Arch-Specific | Arch-Favorable |
---|---|---|
ICC | -march=skylake |
-mtune=skylake
|
GCC | -march=skylake |
-mtune=skylake
|
LLVM | -march=skylake |
-mtune=skylake
|
Visual Studio | /arch:AVX2 |
/tune:skylake
|
CPUID[edit]
Core | Extended Family |
Family | Extended Model |
Model | Stepping |
---|---|---|---|---|---|
U | 0 | 0x6 | 0x8 | 0xE | 0xA |
Family 6 Model 142 Stepping 10 |
Kaby Lake R Processors[edit]
List of Kaby Lake R Processors | |||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Main processor | IGP | ||||||||||||||||||||
Model | Launched | Price | Family | Cores | Threads | L3$ | TDP | Frequency | Turbo | Max Mem | Name | Frequency | Turbo | ||||||||
i5-8250U | 21 August 2017 | $ 297.00 € 267.30 £ 240.57 ¥ 30,689.01 | Core i5 | 4 | 8 | 6 MiB 6,144 KiB 6,291,456 B 0.00586 GiB | 15 W 15,000 mW 0.0201 hp 0.015 kW | 1.6 GHz 1,600 MHz 1,600,000 kHz | 3.4 GHz 3,400 MHz 3,400,000 kHz | 32 GiB 32,768 MiB 33,554,432 KiB 34,359,738,368 B 0.0313 TiB | UHD Graphics 620 | 300 MHz 0.3 GHz 300,000 KHz | 1,100 MHz 1.1 GHz 1,100,000 KHz | ||||||||
i5-8350U | 21 August 2017 | $ 297.00 € 267.30 £ 240.57 ¥ 30,689.01 | Core i5 | 4 | 8 | 6 MiB 6,144 KiB 6,291,456 B 0.00586 GiB | 15 W 15,000 mW 0.0201 hp 0.015 kW | 1.7 GHz 1,700 MHz 1,700,000 kHz | 3.6 GHz 3,600 MHz 3,600,000 kHz | 32 GiB 32,768 MiB 33,554,432 KiB 34,359,738,368 B 0.0313 TiB | UHD Graphics 620 | 300 MHz 0.3 GHz 300,000 KHz | 1,100 MHz 1.1 GHz 1,100,000 KHz | ||||||||
i7-8550U | 21 August 2017 | $ 409.00 € 368.10 £ 331.29 ¥ 42,261.97 | Core i7 | 4 | 8 | 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB | 15 W 15,000 mW 0.0201 hp 0.015 kW | 1.8 GHz 1,800 MHz 1,800,000 kHz | 4 GHz 4,000 MHz 4,000,000 kHz | 32 GiB 32,768 MiB 33,554,432 KiB 34,359,738,368 B 0.0313 TiB | UHD Graphics 620 | 300 MHz 0.3 GHz 300,000 KHz | 1,150 MHz 1.15 GHz 1,150,000 KHz | ||||||||
i7-8650U | 21 August 2017 | $ 409.00 € 368.10 £ 331.29 ¥ 42,261.97 | Core i7 | 4 | 8 | 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB | 15 W 15,000 mW 0.0201 hp 0.015 kW | 1.9 GHz 1,900 MHz 1,900,000 kHz | 4.2 GHz 4,200 MHz 4,200,000 kHz | 32 GiB 32,768 MiB 33,554,432 KiB 34,359,738,368 B 0.0313 TiB | UHD Graphics 620 | 300 MHz 0.3 GHz 300,000 KHz | 1,150 MHz 1.15 GHz 1,150,000 KHz | ||||||||
Count: 4 |
Documents[edit]
See also[edit]
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Kaby Lake R - Cores - Intel#package + |
designer | Intel + |
first announced | August 21, 2017 + |
first launched | August 21, 2017 + |
instance of | core + |
isa | x86-64 + |
main image | + and + |
main image caption | Package front side + and Package back side + |
manufacturer | Intel + |
microarchitecture | Kaby Lake + |
name | Kaby Lake R + |
package | FCBGA-1356 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |