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Difference between revisions of "intel/microarchitectures/gen10"
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'''Gen10''' (''Generation 10'') is the [[microarchitecture]] for [[Intel]]'s [[graphics processing unit]] utilized by {{\\|Cannonlake}}-based microprocessors. Gen10 is the successor to {{\\|Gen9.5}} used by {{\\|Kaby Lake}}.
 
'''Gen10''' (''Generation 10'') is the [[microarchitecture]] for [[Intel]]'s [[graphics processing unit]] utilized by {{\\|Cannonlake}}-based microprocessors. Gen10 is the successor to {{\\|Gen9.5}} used by {{\\|Kaby Lake}}.
  
The display portion of this architecture is also used by {{\\|Goldmont Plus}}, however it still uses {{\\|Gen9.5}} for the execution units.
+
The display portion of this architecture is also used by {{\\|Goldmont Plus}}, however, it still uses {{\\|Gen9.5}} for the execution units.
 
 
 
 
{{future information}}
 
  
 +
'''Due to Intel skipping over {{\\|Cannon Lake}}, Gen10 graphics have never been productized.'''
  
 
== Codenames ==
 
== Codenames ==
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| GT4e || Contains 3 slices with 72 execution units. Has an additional [[eDRAM]] side cache.
 
| GT4e || Contains 3 slices with 72 execution units. Has an additional [[eDRAM]] side cache.
 
|}
 
|}
 
== Models ==
 
{{empty section}}
 
 
== Hardware Accelerated Video ==
 
{{empty section}}
 
  
 
== Architecture ==
 
== Architecture ==

Revision as of 23:39, 30 January 2019

Edit Values
Gen10 µarch
General Info
Arch TypeGPU
DesignerIntel
ManufacturerIntel
Introduction2018
Process10 nm
Succession

Gen10 (Generation 10) is the microarchitecture for Intel's graphics processing unit utilized by Cannonlake-based microprocessors. Gen10 is the successor to Gen9.5 used by Kaby Lake.

The display portion of this architecture is also used by Goldmont Plus, however, it still uses Gen9.5 for the execution units.

Due to Intel skipping over Cannon Lake, Gen10 graphics have never been productized.

Codenames

iris graphics logo.svg

Various models support different Graphics Tiers (GT) which provides different levels of performance. Some models also support an additional eDRAM side cache.

Code Name Description
GT1 Contains 1 slice with 24 execution units.
GT2 Contains 1 slice with 40 execution units.
GT3 Contains 2 slices with 48 execution units.
GT3e Contains 2 slices with 48 execution units. Has an additional eDRAM side cache.
GT4e Contains 3 slices with 72 execution units. Has an additional eDRAM side cache.

Architecture

Key changes from Gen9.5

  • Display
    • HDMI 2.0 (from 1.4a)
      • 2160p (4K) @ 60 Hz (from 24 Hz)

This list is incomplete; you can help by expanding it.

codenameGen10 +
designerIntel +
first launched2018 +
full page nameintel/microarchitectures/gen10 +
instance ofmicroarchitecture +
manufacturerIntel +
microarchitecture typeGPU +
nameGen10 +
process10 nm (0.01 μm, 1.0e-5 mm) +