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Difference between revisions of "intel/microarchitectures/sunny cove"
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|predecessor=Palm Cove | |predecessor=Palm Cove | ||
|predecessor link=intel/microarchitectures/palm cove | |predecessor link=intel/microarchitectures/palm cove | ||
+ | |successor=Willow Cove | ||
+ | |successor link=intel/microarchitectures/willow cove | ||
}} | }} | ||
'''Sunny Cove''' is a high-performance [[10 nm]] [[x86]] core microarchitecture designed by [[Intel]] for an array of server and client products. | '''Sunny Cove''' is a high-performance [[10 nm]] [[x86]] core microarchitecture designed by [[Intel]] for an array of server and client products. |
Revision as of 22:38, 25 December 2018
Edit Values | |
Sunny Cove µarch | |
General Info | |
Arch Type | CPU |
Designer | Intel |
Manufacturer | Intel |
Introduction | 2019 |
Process | 10 nm |
Instructions | |
ISA | x86-64 |
Succession | |
Sunny Cove is a high-performance 10 nm x86 core microarchitecture designed by Intel for an array of server and client products.
Process Technology
Sunny Cove is designed to take advantage of Intel's 10 nm process.
Architecture
Key changes from Skylake (Server)
Facts about "Sunny Cove - Microarchitectures - Intel"
codename | Sunny Cove + |
designer | Intel + |
first launched | 2019 + |
full page name | intel/microarchitectures/sunny cove + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Sunny Cove + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |