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Difference between revisions of "intel/cores/cascade lake ap"
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Revision as of 04:12, 5 November 2018

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Cascade Lake AP
General Info
DesignerIntel
ManufacturerIntel
Microarchitecture
ISAx86-64
MicroarchitectureCascade Lake
PlatformWalker Pass
Word Size
8 octets
16 nibbles
64 bit
Process14 nm
0.014 μm
1.4e-5 mm
TechnologyCMOS
Packaging
PackageFCBGA-5903 (BGA)
Pitch0.99 mm
Contacts5903

Cascade Lake AP (Cascade Lake Advanced Performance) is code name for a series of high core-count multi-chip packaged server multiprocessors based on the Cascade Lake microarchitecture part of the Walker Pass.


Symbol version future.svg Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.


Overview

Cascade Lake AP comprise of multiple Cascade Lake dies in a single package. Those processors support up to 48 cores, 96 threads, and up to 12 DDR4 channels.

Common Features

  • 12-channel memory
    • UP to DDR4-2666 MT/s
    • ECC support
  • TDP: ? W to ? W
  • PCIe: x? Lanes of PCIe Gen 3
  • ISA: Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, AVX512F, AVX512CD, AVX512BW, AVX512DQ, AVX512VL, AVX512VNNI)
  • Features: Speed Shift, vPro, VT-x, TSX, TXT

Cascade Lake AP Processors

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See also

arrow up 1.svgPower/Performance

designerIntel +
instance ofcore +
isax86-64 +
manufacturerIntel +
microarchitectureCascade Lake +
nameCascade Lake AP +
packageFCBGA-5903 +
platformWalker Pass +
process14 nm (0.014 μm, 1.4e-5 mm) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +