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Difference between revisions of "intel/cores/cascade lake ap"
< intel

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|isa=x86-64
 
|isa=x86-64
 
|microarch=Cascade Lake
 
|microarch=Cascade Lake
|platform=Purley
 
|chipset=Lewisburg
 
 
|word=64 bit
 
|word=64 bit
 
|proc=14 nm
 
|proc=14 nm
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|package name 1=intel,fcbga_5903
 
|package name 1=intel,fcbga_5903
 
}}
 
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'''Cascade Lake AP''' is a planned series of server [[multiprocessors]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture as part of the {{intel|Purley|l=platform}} platform.
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'''Cascade Lake AP''' ('''Cascade Lake Advanced Performance''') is code name for a series of high core-count multi-chip packaged server [[multiprocessors]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture.
  
  

Revision as of 02:57, 5 November 2018

Edit Values
Cascade Lake AP
General Info
DesignerIntel
ManufacturerIntel
Microarchitecture
ISAx86-64
MicroarchitectureCascade Lake
Word Size
8 octets
16 nibbles
64 bit
Process14 nm
0.014 μm
1.4e-5 mm
TechnologyCMOS
Packaging
PackageFCBGA-5903 (BGA)
Pitch0.99 mm
Contacts5903

Cascade Lake AP (Cascade Lake Advanced Performance) is code name for a series of high core-count multi-chip packaged server multiprocessors based on the Cascade Lake microarchitecture.


Symbol version future.svg Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.


Overview

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Common Features

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Cascade Lake AP Processors

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See also

arrow up 1.svgPower/Performance

designerIntel +
instance ofcore +
isax86-64 +
manufacturerIntel +
microarchitectureCascade Lake +
nameCascade Lake AP +
packageFCBGA-5903 +
process14 nm (0.014 μm, 1.4e-5 mm) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +