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Difference between revisions of "intel/microarchitectures/netburst (client)"
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(additional info for 1M and 2M L2)
 
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{{intel title|NetBurst|arch}}
 
{{intel title|NetBurst|arch}}
 
{{microarchitecture
 
{{microarchitecture
−
| type            = CPU
+
|atype=CPU
−
| name             = NetBurst
+
|name=NetBurst
−
| designer         = Intel
+
|designer=Intel
−
| manufacturer     = Intel
+
|manufacturer=Intel
−
| introduction     = November 20, 2000
+
|introduction=November 20, 2000
−
| phase-out       = April, 2006
+
|phase-out=April, 2006
−
| process         = 180 nm
+
|process=180 nm
 +
|isa=x86-32
 +
|isa 2=x86-64
  
−
| succession      = Yes
+
|predecessor=P6
−
| predecessor     = P6
+
|predecessor link=intel/microarchitectures/p6
−
| predecessor link = intel/microarchitectures/p6
+
|successor=Enhanced NetBurst
−
| successor       = Core
+
|successor link=intel/microarchitectures/enhanced_netburst
−
| successor link   = intel/microarchitectures/core
+
|successor 2=Sandy Bridge
 +
|successor 2 link=intel/microarchitectures/sandy_bridge (client)
 +
|succession=Yes
 
}}
 
}}
 
'''NetBurst''' (also '''P68''') was the [[microarchitecture]] for [[Intel]]'s [[180 nm process]] for desktops and servers as a successor to {{\\|P6}}. NetBurst was replaced by the {{\\|Core}} microarchitecture in early 2006.
 
'''NetBurst''' (also '''P68''') was the [[microarchitecture]] for [[Intel]]'s [[180 nm process]] for desktops and servers as a successor to {{\\|P6}}. NetBurst was replaced by the {{\\|Core}} microarchitecture in early 2006.
 +
 +
== Die ==
 +
=== Willamette ===
 +
[[File:p4 die slide.png|right|200px]]
 +
* {{intel|Willamette|l=core}} core
 +
* [[180 nm process]]
 +
* 217 mm² die size
 +
* 42,000,000 transistors
 +
 +
 +
:[[File:netburst willamette core die.png|class=wikichip_ogimage|700px]]
 +
 +
=== Northwood ===
 +
* {{intel|Northwood|l=core}} core
 +
* [[130 nm process]]
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* 131 mm² die size
 +
* 55,000,000 transistors
 +
 +
 +
:[[File:netburst northwood core die.png|700px]]
 +
 +
 +
=== Prescott ===
 +
* {{intel|Prescott|l=core}} core
 +
* [[90 nm process]]
 +
* 1M L2 112 mm², 2M L2 135 mm² die size
 +
* 125M, 169,000,000 transistors
 +
1M L2
 +
:[[File:netburst prescott core die.png|700px]]
 +
2M L2
 +
:[[File:Pentium_4_6xx-die_2M.jpg|700px]]
 +
 +
=== Additional Shots ===
 +
Additional die and wafer shots provided by Intel:
 +
 +
<gallery mode=slideshow>
 +
File:netburst wafer.png|Netburst wafer
 +
</gallery>

Latest revision as of 10:51, 26 August 2018

Edit Values
NetBurst µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
IntroductionNovember 20, 2000
Phase-outApril, 2006
Process180 nm
Instructions
ISAx86-32, x86-64
Succession

NetBurst (also P68) was the microarchitecture for Intel's 180 nm process for desktops and servers as a successor to P6. NetBurst was replaced by the Core microarchitecture in early 2006.

Die[edit]

Willamette[edit]

p4 die slide.png


netburst willamette core die.png

Northwood[edit]


netburst northwood core die.png


Prescott[edit]

1M L2

netburst prescott core die.png

2M L2

Pentium 4 6xx-die 2M.jpg

Additional Shots[edit]

Additional die and wafer shots provided by Intel:

  • Netburst wafer

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/netburst_(client)&oldid=81837"
Facts about "NetBurst - Microarchitectures - Intel"
RDF feed
codenameNetBurst +
designerIntel +
first launchedNovember 20, 2000 +
full page nameintel/microarchitectures/netburst (client) +
instance ofmicroarchitecture +
instruction set architecturex86-32 + and x86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameNetBurst +
phase-outApril 2006 +
process180 nm (0.18 μm, 1.8e-4 mm) +