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From WikiChip
Difference between revisions of "zhaoxin/kaisheng"
< zhaoxin
(kh) |
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Revision as of 11:23, 13 June 2018
| KaiXian | |
| Developer | Zhaoxin |
| Manufacturer | TSMC |
| Type | Microprocessors |
| Introduction | 2016 (announced) 2016 (launch) |
| ISA | x86 |
| µarch | WuDaoKou, LuJiaZui |
| Word size | 64 bit 8 octets
16 nibbles |
| Process | 28 nm 0.028 μm
2.8e-5 mm |
| Technology | CMOS |
| Succession | |
| ← | |
| QuadCore | |
KaisHeng (KH) is a family of x86 microprocessors developed by Zhaoxin for the Chinese market. This family is primarily targeting server and networking devices.
Facts about "KaisHeng (KH) - Zhaoxin"
| designer | Zhaoxin + |
| first announced | 2016 + |
| first launched | 2016 + |
| full page name | zhaoxin/kaisheng + |
| instance of | microprocessor family + |
| instruction set architecture | x86 + |
| main designer | Zhaoxin + |
| manufacturer | TSMC + |
| microarchitecture | WuDaoKou + and LuJiaZui + |
| name | KaiXian + |
| process | 28 nm (0.028 μm, 2.8e-5 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |