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Difference between revisions of "risc-v/microarchitectures"
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(Created page with "{{risc-v title|Microarchitectures}}{{risc-v isa main}} Various '''microarchitectures''' have been designed for RISC-V by a number of companies. Below is a list of those mi...")
 
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| RV64GC || {{sifive|E54-MC|l=arch}}
 
| RV64GC || {{sifive|E54-MC|l=arch}}
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| [[Andes]] || RV32IMAC || {{andes|N25|l=arch}}
 
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| [[Esperanto]] || RV64GC || {{esperanto|ET-Minion|l=arch}}, {{esperanto|ET-Maxion|l=arch}}
 
| [[Esperanto]] || RV64GC || {{esperanto|ET-Minion|l=arch}}, {{esperanto|ET-Maxion|l=arch}}
 
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Revision as of 18:52, 25 December 2017

RISC-V
Instruction Set Architecture
General
Base Variants(base)
Standard Extensions(all)
Topics

v · d · e

Various microarchitectures have been designed for RISC-V by a number of companies. Below is a list of those microarchitectures.

List of Microarchitectures

Designer ISA Microarchitectures
SiFive RV32IMAC E31
RV64IMAC E51
RV64GC E54-MC
Andes RV32IMAC N25
Esperanto RV64GC ET-Minion, ET-Maxion
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