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Difference between revisions of "intel/xeon e5/e5-1650 v4"
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{{intel title|Xeon E5-1650 v4}} | {{intel title|Xeon E5-1650 v4}} | ||
− | {{ | + | {{chip |
| name = Xeon E5-1650 v4 | | name = Xeon E5-1650 v4 | ||
| no image = Yes | | no image = Yes | ||
Line 10: | Line 10: | ||
| model number = E5-1650 v4 | | model number = E5-1650 v4 | ||
| part number = CM8066002044306 | | part number = CM8066002044306 | ||
− | | part number | + | | part number 2 = BX80660E51650V4 |
− | |||
| part number 3 = | | part number 3 = | ||
+ | | part number 4 = | ||
| market = Server | | market = Server | ||
| first announced = June 20, 2016 | | first announced = June 20, 2016 | ||
Line 34: | Line 34: | ||
| s-spec = SR2P7 | | s-spec = SR2P7 | ||
| s-spec es = | | s-spec es = | ||
− | | s-spec qs = | + | | s-spec qs = QKF2 |
+ | | s-spec qs 2 = QKVL | ||
| cpuid = 406F1 | | cpuid = 406F1 | ||
Line 54: | Line 55: | ||
| max memory = 1,536 GiB | | max memory = 1,536 GiB | ||
− | + | ||
| v core = 1.82 V | | v core = 1.82 V | ||
| v core tolerance = | | v core tolerance = | ||
Line 84: | Line 85: | ||
}} | }} | ||
The '''Xeon E5-1650 v4''' is a {{arch|64}} [[hexa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 1S workstations. Operating at 3.6 GHz with a {{intel|turbo boost}} frequency of 4 GHz for a single active core, this MPU has a TDP of 140 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}). | The '''Xeon E5-1650 v4''' is a {{arch|64}} [[hexa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 1S workstations. Operating at 3.6 GHz with a {{intel|turbo boost}} frequency of 4 GHz for a single active core, this MPU has a TDP of 140 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}). | ||
+ | |||
+ | == Cache == | ||
+ | {{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell § Cache}} | ||
+ | {{cache info | ||
+ | |l1i cache=192 KiB | ||
+ | |l1i break=6x32 KiB | ||
+ | |l1i desc=8-way set associative | ||
+ | |l1i extra=(per core, write-back) | ||
+ | |l1d cache=192 KiB | ||
+ | |l1d break=6x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l1d extra=(per core, write-back) | ||
+ | |l2 cache=1.5 MiB | ||
+ | |l2 break=6x256 KiB | ||
+ | |l2 desc=8-way set associative | ||
+ | |l2 extra=(per core, write-back) | ||
+ | |l3 cache=15 MiB | ||
+ | |l3 break=6x2.5 MiB | ||
+ | |l3 desc=20-way set associative | ||
+ | |l3 extra=(shared, per core, write-back) | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | This microprocessor has no [[integrated graphics processing unit]]. | ||
+ | |||
+ | == Memory controller == | ||
+ | {{integrated memory controller | ||
+ | | type = DDR4-2400 | ||
+ | | controllers = 1 | ||
+ | | channels = 4 | ||
+ | | ecc support = Yes | ||
+ | | max bandwidth = 71.53 GiB/s | ||
+ | | bandwidth schan = 17.88 GiB/s | ||
+ | | bandwidth dchan = 35.76 GiB/s | ||
+ | | max memory = 1,536 GiB | ||
+ | | pae = 46 bit | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions | ||
+ | | pcie revision = 3.0 | ||
+ | | pcie lanes = 40 | ||
+ | | pcie config = x4 | ||
+ | | pcie config 1 = x8 | ||
+ | | pcie config 2 = x16 | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=No | ||
+ | |protected=No | ||
+ | |smm=No | ||
+ | |fpu=No | ||
+ | |x8616=No | ||
+ | |x8632=No | ||
+ | |x8664=No | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=No | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=No | ||
+ | |sse42=No | ||
+ | |sse4a=No | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
+ | |avx512f=No | ||
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |abm=No | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=No | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=No | ||
+ | |clmul=No | ||
+ | |f16c=Yes | ||
+ | |tbt1=No | ||
+ | |tbt2=Yes | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=Yes | ||
+ | |txt=Yes | ||
+ | |ht=Yes | ||
+ | |vpro=Yes | ||
+ | |vtx=No | ||
+ | |vtd=No | ||
+ | |ept=Yes | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=No | ||
+ | |em64t=Yes | ||
+ | |vt-x=Yes | ||
+ | |vt-d=Yes | ||
+ | |sse4_1=Yes | ||
+ | |sse4_2=Yes | ||
+ | |pclmul=Yes | ||
+ | |bmi=Yes | ||
+ | |secure key=Yes | ||
+ | |os guard=Yes | ||
+ | |intel ipt=Yes | ||
+ | }} |
Revision as of 01:04, 24 December 2017
Edit Values | |
Xeon E5-1650 v4 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | E5-1650 v4 |
Part Number | CM8066002044306, BX80660E51650V4 |
S-Spec | SR2P7 QKF2 (QS), QKVL (QS) |
Market | Server |
Introduction | June 20, 2016 (announced) June 20, 2016 (launched) |
Release Price | $617.00 |
Shop | Amazon |
General Specs | |
Family | Xeon E5 |
Series | E5-1000 |
Locked | Yes |
Frequency | 3,600 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 4,000 MHz (1 core) |
Bus type | DMI 2.0 |
Bus rate | 5 GT/s |
Clock multiplier | 36 |
CPUID | 406F1 |
Microarchitecture | |
Microarchitecture | Broadwell |
Platform | Grantley EP Workstation |
Chipset | C610 Series |
Core Name | Broadwell EP |
Core Family | 6 |
Core Model | 4F |
Core Stepping | R0 |
Process | 14 nm |
Transistors | 3,200,000,000 |
Technology | CMOS |
Die | 246.24 mm² |
Word Size | 64 bit |
Cores | 6 |
Threads | 12 |
Max Memory | 1,536 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Vcore | 1.82 V |
VI/O | 1.2 V ± 3% |
TDP | 140 W |
Tcase | 0 °C – 69 °C |
Tstorage | -25 °C – 125 °C |
The Xeon E5-1650 v4 is a 64-bit hexa-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for 1S workstations. Operating at 3.6 GHz with a turbo boost frequency of 4 GHz for a single active core, this MPU has a TDP of 140 W and is manufactured on a 14 nm process (based on Broadwell).
Cache
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 192 KiB 196,608 B 0.188 MiB |
6x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 192 KiB 196,608 B 0.188 MiB |
6x32 KiB 8-way set associative (per core, write-back) |
L2$ | 1.5 MiB 1,536 KiB 1,572,864 B 0.00146 GiB |
6x256 KiB 8-way set associative (per core, write-back) |
L3$ | 15 MiB 15,360 KiB 15,728,640 B 0.0146 GiB |
6x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics
This microprocessor has no integrated graphics processing unit.
Memory controller
Integrated Memory Controller | |
Type | DDR4-2400 |
Controllers | 1 |
Channels | 4 |
ECC Support | Yes |
Max bandwidth | 71.53 GiB/s |
Bandwidth (single) | 17.88 GiB/s |
Bandwidth (dual) | 35.76 GiB/s |
Max memory | 1,536 GiB |
Physical Address Extensions | 46 bit |
Expansions
Expansion Options
|
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|
Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
|
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Facts about "Xeon E5-1650 v4 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E5-1650 v4 - Intel#io + |
base frequency | 3,600 MHz (3.6 GHz, 3,600,000 kHz) + |
bus rate | 5,000 MT/s (5 GT/s, 5,000,000 kT/s) + |
bus type | DMI 2.0 + |
chipset | C610 Series + |
clock multiplier | 36 + |
core count | 6 + |
core family | 6 + |
core model | 4F + |
core name | Broadwell EP + |
core stepping | R0 + |
core voltage | 1.82 V (18.2 dV, 182 cV, 1,820 mV) + |
cpuid | 406F1 + |
designer | Intel + |
die area | 246.24 mm² (0.382 in², 2.462 cm², 246,240,000 µm²) + |
family | Xeon E5 + |
first announced | June 20, 2016 + |
first launched | June 20, 2016 + |
full page name | intel/xeon e5/e5-1650 v4 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Extended Page Tables + and Transactional Synchronization Extensions + |
has intel enhanced speedstep technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
io voltage | 1.2 V (12 dV, 120 cV, 1,200 mV) + |
io voltage tolerance | 3% + |
l1d$ description | 8-way set associative + |
l1d$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) + |
l3$ description | 20-way set associative + |
l3$ size | 15 MiB (15,360 KiB, 15,728,640 B, 0.0146 GiB) + |
ldate | June 20, 2016 + |
manufacturer | Intel + |
market segment | Server + |
max case temperature | 342.15 K (69 °C, 156.2 °F, 615.87 °R) + |
max cpu count | 1 + |
max memory | 1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) + |
max pcie lanes | 40 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Broadwell + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | E5-1650 v4 + |
name | Xeon E5-1650 v4 + |
part number | CM8066002044306 + and BX80660E51650V4 + |
platform | Grantley EP Workstation + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 617.00 (€ 555.30, £ 499.77, ¥ 63,754.61) + |
s-spec | SR2P7 + |
s-spec (qs) | QKF2 + and QKVL + |
series | E5-1000 + |
smp max ways | 1 + |
tdp | 140 W (140,000 mW, 0.188 hp, 0.14 kW) + |
technology | CMOS + |
thread count | 12 + |
transistor count | 3,200,000,000 + |
turbo frequency (1 core) | 4,000 MHz (4 GHz, 4,000,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |