Difference between revisions of "intel/celeron/3955u"

	Edit Values
	Celeron 3955U
	General Info
Designer	Intel
Manufacturer	Intel
Model Number	3955U
Part Number	FJ8066201931006
S-Spec	SR2EW
Market	Mobile
Introduction	August 15, 2015 (announced); December 27, 2015 (launched)
Release Price	$107.00
Shop	Amazon
	General Specs
Family	Celeron
Series	3000
Locked	Yes
Frequency	2,000 MHz
Bus type	OPI
Bus rate	4 GT/s
Clock multiplier	20
	Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Skylake
Core Name	Skylake U
Core Family	6
Core Model	78
Core Stepping	D1
Process	14 nm
Transistors	1,750,000,000
Technology	CMOS
Die	98.57 mm²; 10.3 mm × 9.57 mm
MCP	Yes (2 dies)
Word Size	64 bit
Cores	2
Threads	2
Max Memory	32 GiB
	Multiprocessing
Max SMP	1-Way (Uniprocessor)
	Electrical
Vcore	0.55 V-1.52 V
TDP	15 W
cTDP down	10 W
Tjunction	0 °C – 100 °C
Tstorage	-25 °C – 125 °C
	Packaging
Package	FCBGA-1356 (BGA)
Dimension	42 mm x 24 mm x 1.3 mm
Pitch	0.65 mm
Ball Count	1356
Ball Comp	SAC405
Interconnect	BGA-1356

Latest revision as of 15:15, 13 December 2017

Celeron 3955U is a 64-bit dual-core budget x86 mobile microprocessor introduced by Intel in late 2015. Fabricated on a 14 nm process based on the Skylake microarchitecture, this processor operates at 2 GHz. The 3955U has a TDP of 15 W with a configurable TDP-down of 10 W. This chip incorporates the HD Graphics 510 GPU operating at 300 MHz with a burst frequency of 900 MHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.

Cache[edit]

Main article: Skylake § Cache

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

128 KiB

131,072 B
0.125 MiB

L1I$	64 KiB 65,536 B 0.0625 MiB	2x32 KiB	8-way set associative
L1D$	64 KiB 65,536 B 0.0625 MiB	2x32 KiB	8-way set associative	write-back

L2$

512 KiB

0.5 MiB
524,288 B
4.882812e-4 GiB

		2x256 KiB	4-way set associative	write-back

L3$

2 MiB

2,048 KiB
2,097,152 B
0.00195 GiB

		2x1 MiB		write-back

Memory controller[edit]

[Edit/Modify Memory Info]

Integrated Memory Controller

Max Type	DDR4-2133, LPDDR3-1866, DDR3L-1600
Supports ECC	No
Max Mem	32 GiB
Controllers	1
Channels	2
Max Bandwidth	31.79 GiB/s 32,552.96 MiB/s 34.134 GB/s 34,134.253 MB/s 0.031 TiB/s 0.0341 TB/s
Bandwidth	Single 15.89 GiB/s Double 31.79 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

Expansion Options

PCIe

Revision	3.0
Max Lanes	12
Configs	1x4, 2x2, 1x2+2x1, 4x1

Graphics[edit]

[Edit/Modify IGP Info]

Integrated Graphics Information

GPU

HD Graphics 510

Designer

Intel

Device ID

0x1906

Execution Units

12

Max Displays

3

Max Memory

32 GiB

32,768 MiB
33,554,432 KiB
34,359,738,368 B

Frequency

300 MHz

0.3 GHz
300,000 KHz

Burst Frequency

900 MHz

0.9 GHz
900,000 KHz

Output

DP, eDP, HDMI, DVI

Max Resolution

HDMI	4096x2304 @24 Hz
DP	4096x2304 @60 Hz
eDP	4096x2304 @60 Hz

Standards

DirectX	12
OpenGL	4.4
OpenCL	2.0
DP	1.2
eDP	1.3
HDMI	1.4a

Additional Features

Intel Quick Sync Video

Intel Clear Video HD

[Edit] Skylake (Gen9) Hardware Accelerated Video Capabilities
Codec	Encode			Decode
Codec	Profiles	Levels	Max Resolution	Profiles	Levels	Max Resolution
MPEG-2 (H.262)	Main	High	1080p (FHD)	Main	Main, High	1080p (FHD)
MPEG-4 AVC (H.264)	High, Main	5.1	2160p (4K)	Main, High, SHP, MHP	5.1	2160p (4K)
JPEG/MJPEG	Baseline	-	16k x 16k	Baseline	Unified	16k x 16k
HEVC (H.265)	Main	5.1	2160p (4K)	Main, Main 10	5.1	2160p (4K)
VC-1	✘			Advanced, Main, Simple	3, High	3840x3840
VP8	Unified	Unified	-	0	Unified	1080p
VP9	✘			0	Unified	2160p (4K)

Features[edit]

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
EMMX	Extended MMX Extension
SSE	Streaming SIMD Extensions
SSE2	Streaming SIMD Extensions 2
SSE3	Streaming SIMD Extensions 3
SSSE3	Supplemental SSE3
SSE4.1	Streaming SIMD Extensions 4.1
SSE4.2	Streaming SIMD Extensions 4.2
ABM	Advanced Bit Manipulation
BMI1	Bit Manipulation Instruction Set 1
BMI2	Bit Manipulation Instruction Set 2
AES	AES Encryption Instructions
RdRand	Hardware RNG
ADX	Multi-Precision Add-Carry
CLMUL	Carry-less Multiplication Extension
F16C	16-bit Floating Point Conversion

x86-16	16-bit x86
x86-32	32-bit x86
x86-64	64-bit x86
Real	Real Mode
Protected	Protected Mode
SMM	System Management Mode
FPU	Integrated x87 FPU
NX	No-eXecute
EIST	Enhanced SpeedStep Technology
VT-x	VT-x (Virtualization)
VT-d	VT-d (I/O MMU virtualization)
EPT	Extended Page Tables (SLAT)
SGX	Software Guard Extensions
Secure Key	Secure Key Technology
Flex Memory	Flex Memory Access
ISRT	Smart Response Technology
MWT	My WiFi Technology
IPT	Identity Protection Technology

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Celeron 3955U - Intel#package + and Celeron 3955U - Intel#io +
base frequency	2,000 MHz (2 GHz, 2,000,000 kHz) +
bus rate	4,000 MT/s (4 GT/s, 4,000,000 kT/s) +
bus type	OPI +
clock multiplier	20 +
core count	2 +
core family	6 +
core model	78 +
core name	Skylake U +
core stepping	D1 +
core voltage (max)	1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)	0.55 V (5.5 dV, 55 cV, 550 mV) +
designer	Intel +
device id	0x1906 +
die area	98.57 mm² (0.153 in², 0.986 cm², 98,570,000 µm²) +
die count	2 +
die length	10.3 mm (1.03 cm, 0.406 in, 10,300 µm) +
die width	9.57 mm (0.957 cm, 0.377 in, 9,570 µm) +
family	Celeron +
first announced	August 15, 2015 +
first launched	December 27, 2015 +
full page name	intel/celeron/3955u +
has ecc memory support	false +
has extended page tables support	true +
has feature	Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Software Guard Extensions +, Secure Key Technology +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology + and Identity Protection Technology +
has intel enhanced speedstep technology	true +
has intel flex memory access support	true +
has intel identity protection technology support	true +
has intel my wifi technology support	true +
has intel secure key technology	true +
has intel smart response technology support	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	HD Graphics 510 +
integrated gpu base frequency	300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu designer	Intel +
integrated gpu execution units	12 +
integrated gpu max frequency	900 MHz (0.9 GHz, 900,000 KHz) +
integrated gpu max memory	32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB) +
is multi-chip package	true +
isa	x86-64 +
isa family	x86 +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	8-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	8-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	4-way set associative +
l2$ size	0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ size	2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldate	December 27, 2015 +
main image	+
manufacturer	Intel +
market segment	Mobile +
max cpu count	1 +
max junction temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory	32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) +
max memory bandwidth	31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels	2 +
max pcie lanes	12 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Skylake +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	3955U +
name	Celeron 3955U +
package	FCBGA-1356 +
part number	FJ8066201931006 +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 107.00 (€ 96.30, £ 86.67, ¥ 11,056.31) +
s-spec	SR2EW +
series	3000 +
smp max ways	1 +
supported memory type	DDR4-2133 +, LPDDR3-1866 + and DDR3L-1600 +
tdp	15 W (15,000 mW, 0.0201 hp, 0.015 kW) +
tdp down	10 W (10,000 mW, 0.0134 hp, 0.01 kW) +
technology	CMOS +
thread count	2 +
transistor count	1,750,000,000 +
word size	64 bit (8 octets, 16 nibbles) +
x86/has software guard extensions	true +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas

Samsung

Latest revision as of 15:15, 13 December 2017

Contents

Cache[edit]

Memory controller[edit]

Expansions[edit]

Graphics[edit]

Features[edit]

@@ Line 1: / Line 1: @@
-{{intel title|3955U}}
+{{intel title|Celeron 3955U}}
-{{mpu
+{{chip
-| name               = Intel Celeron 3955U
+|name=Celeron 3955U
-| no image           = Yes
+|image=skylake u (front; standard).png
-| image              =
+|designer=Intel
-| image size         =
+|manufacturer=Intel
-| caption            =
+|model number=3955U
-| designer           = Intel
+|part number=FJ8066201931006
-| manufacturer       = Intel
+|s-spec=SR2EW
-| model number       = 3955U
+|market=Mobile
-| part number        =
+|first announced=August 15, 2015
-| market             = Mobile
+|first launched=December 27, 2015
-| first announced    = August 15, 2015
+|release price=$107.00
-| first launched     = December 27, 2015
+|family=Celeron
-| last order         =
+|series=3000
-| last shipment      =
+|locked=Yes
+|frequency=2,000 MHz
-| family             = Celeron
+|bus type=OPI
-| series             = 3000
+|bus rate=4 GT/s
-| locked             = Yes
+|clock multiplier=20
-| frequency          = 2000 MHz
+|isa=x86-64
-| turbo frequency    =
+|isa family=x86
-| turbo frequency1   =
+|microarch=Skylake
-| turbo frequency2   =
+|core name=Skylake U
-| turbo frequency3   =
+|core family=6
-| turbo frequency4   =
+|core model=78
-| bus type           =
+|core stepping=D1
-| bus speed          =
+|process=14 nm
-| clock multiplier   = 20
+|transistors=1,750,000,000
-| s-spec             =
+|technology=CMOS
+|die area=98.57 mm²
-| isa family          = x86
+|die length=10.3 mm
-| isa                 = x86-64
+|die width=9.57 mm
-| microarch          = Skylake
+|mcp=Yes
-| platform           =
+|die count=2
-| core name          = Skylake U
+|word size=64 bit
-| core stepping      =
+|core count=2
-| process            = 14 nm
+|thread count=2
-| die size           =
+|max cpus=1
-| word size          = 64 bit
+|max memory=32 GiB
-| core count         = 2
+|v core min=0.55 V
-| thread count       = 2
+|v core max=1.52 V
-| max cpus           = 1
+|tdp=15 W
-| max memory         = 32 GB
+|ctdp down=10 W
+|tjunc min=0 °C
-| electrical         = Yes
+|tjunc max=100 °C
-| tdp                = 15 W
+|tstorage min=-25 °C
-| ctdp down          = 10 W
+|tstorage max=125 °C
-| ctdp up            =
+|package module 1={{packages/intel/fcbga-1356}}
-| temp max           = 100 °C
-| temp min           =
-| packaging          = Yes
-| package            = FCBGA1356
-| package type       = FCBGA
-| package pitch      =
-| package size       = 42mm X 24mm
-| socket             = BGA1356
-| socket type        = BGA
 }}
-The '''Intel Celeron 3955U''' is a [[dual-core]] [[64-bit architecture|64-bit]] mobile [[microprocessor]] released by [[Intel]] in the third quarter of 2015. The 3955U is designed to replace the {{intel|Broadwell}}-based celeron. Manufactured using 14nm process, the Skylake-based 3955U Celeron processor can be configured to run at down to 10 Watt TDP. This processor, just like its predecessor lack support for any of Intel's advanced technologies such as hyper-threading, trusted execution, transactional synchronization extensions (TSX), and turbo-boost.
+'''Celeron 3955U''' is a {{arch|64}} [[dual-core]] budget [[x86]] mobile microprocessor introduced by [[Intel]] in late [[2015]]. Fabricated on a [[14 nm process]] based on the {{intel|Skylake}} microarchitecture, this processor operates at 2 GHz. The 3955U has a TDP of 15 W with a configurable TDP-down of 10 W. This chip incorporates the {{intel|HD Graphics 510}} GPU operating at 300 MHz with a burst frequency of 900 MHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.
 == Cache ==
 {{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
-{{cache info
+{{cache size
+|l1 cache=128 KiB
 |l1i cache=64 KiB
 |l1i break=2x32 KiB
+|l1i desc=8-way set associative
 |l1d cache=64 KiB
 |l1d break=2x32 KiB
+|l1d desc=8-way set associative
+|l1d policy=write-back
 |l2 cache=512 KiB
 |l2 break=2x256 KiB
 |l2 desc=4-way set associative
+|l2 policy=write-back
 |l3 cache=2 MiB
+|l3 break=2x1 MiB
+|l3 policy=write-back
+}}
+== Memory controller ==
+{{memory controller
+|type=DDR4-2133
+|type 2=LPDDR3-1866
+|type 3=DDR3L-1600
+|ecc=No
+|max mem=32 GiB
+|controllers=1
+|channels=2
+|max bandwidth=31.79 GiB/s
+|bandwidth schan=15.89 GiB/s
+|bandwidth dchan=31.79 GiB/s
+}}
+== Expansions ==
+{{expansions
+| pcie revision      = 3.0
+| pcie lanes         = 12
+| pcie config        = 1x4
+| pcie config 2      = 2x2
+| pcie config 3      = 1x2+2x1
+| pcie config 4      = 4x1
 }}
 == Graphics ==
-{{integrated graphic
+{{integrated graphics
-| gpu                = Intel HD Graphics 510
+| gpu                 = HD Graphics 510
-| displays           = 3
+| device id           = 0x1906
-| frequency          = 300 MHz
+| designer            = Intel
-| max frequency      = 900 MHz
+| execution units     = 12
-| max memory         = 1700 MB
+| max displays        = 3
-| output edp         = Yes
+| max memory          = 32 GiB
-| output dp          = Yes
+| frequency           = 300 MHz
-| output hdmi        = Yes
+| max frequency       = 900 MHz
-| output vga         =
-| output dvi         = Yes
+| output crt          =
+| output sdvo         =
+| output dsi          =
+| output edp          = Yes
+| output dp           = Yes
+| output hdmi         = Yes
+| output vga          =
+| output dvi          = Yes
 | directx ver        = 12
 | opengl ver         = 4.4
+| opencl ver         = 2.0
+| hdmi ver           = 1.4a
+| dp ver             = 1.2
+| edp ver            = 1.3
 | max res hdmi       = 4096x2304
 | max res hdmi freq  = 24 Hz
@@ Line 96: / Line 129: @@
 | max res vga        =
 | max res vga freq   =
-}}
-== Memory controller ==
+| features             = Yes
-{{integrated memory controller
+| intel quick sync     = Yes
-| type               = DDR4-1866
+| intel intru 3d       =
-| type 1             = DDR4-2133
+| intel insider        =
-| type 2             = LPDDR3-1600
+| intel widi           =
-| type 3             = LPDDR3-1866
+| intel fdi            =
-| controllers        = 1
+| intel clear video    =
-| channels           = 2
+| intel clear video hd = Yes
-| ecc support        =
-| max bandwidth      = 34,100 MB/s
-| max memory         = 32,768 MB
 }}
+{{skylake hardware accelerated video table|col=1}}
-== Expansions ==
+== Features ==
-{{mpu expansions
+{{x86 features
-| pcie revision      = 2.0
+|real=Yes
-| pcie lanes         = 10
+|protected=Yes
-| pcie config        = 1x4
+|smm=Yes
-| pcie config 1      = 2x2
+|fpu=Yes
-| pcie config 2      = 1x2+2x1
+|x8616=Yes
-| pcie config 3      = 4x1
+|x8632=Yes
-}}
+|x8664=Yes
+|nx=Yes
+|mmx=Yes
+|emmx=Yes
+|sse=Yes
+|sse2=Yes
+|sse3=Yes
+|ssse3=Yes
+|sse41=Yes
+|sse42=Yes
+|sse4a=No
+|avx=No
+|avx2=No
-== Features ==
+|abm=Yes
-{{mpu features
+|tbm=No
-| em64t     = Yes
+|bmi1=Yes
-| nx        = Yes
+|bmi2=Yes
-| txt       =
+|fma3=No
-| tsx       =
+|fma4=No
-| ht        =
+|aes=Yes
-| tbt2      =
+|rdrand=Yes
-| vt-x      = Yes
+|sha=No
-| vt-d      = Yes
+|xop=No
-| mmx       = Yes
+|adx=Yes
-| sse       = Yes
+|clmul=Yes
-| sse2      = Yes
+|f16c=Yes
-| sse3      = Yes
+|tbt1=No
-| ssse3     = Yes
+|tbt2=No
-| sse4      = Yes
+|tbmt3=No
-| sse4.1    = Yes
+|bpt=No
-| sse4.2    = Yes
+|eist=Yes
-| aes       = Yes
+|sst=No
-| avx       =
+|flex=Yes
-| avx2      =
+|fastmem=No
-| bmi       =
+|isrt=Yes
-| bmi1      =
+|sba=No
-| bmi2      =
+|mwt=Yes
-| f16c      =
+|sipp=No
-| fma3      =
+|att=No
-| sgx       = Yes
+|ipt=Yes
-| eist      = Yes
+|tsx=No
+|txt=No
+|ht=No
+|vpro=No
+|vtx=Yes
+|vtd=Yes
+|ept=Yes
+|mpx=No
+|sgx=Yes
+|securekey=Yes
+|osguard=No
+|3dnow=No
+|e3dnow=No
+|smartmp=No
+|powernow=No
+|amdvi=No
+|amdv=No
+|amdsme=No
+|amdtsme=No
+|amdsev=No
+|rvi=No
+|smt=No
+|sensemi=No
+|xfr=No
 }}