Difference between revisions of "amd/athlon mp/amsn2800dut4c"

	Edit Values
	AMD Athlon MP 2800+
	General Info
Designer	AMD
Manufacturer	AMD
Model Number	Athlon MP 2800+
Part Number	AMSN2800DUT4C
Market	Server
Introduction	May 6, 2003 (announced); May 6, 2003 (launched)
Release Price	$275
Shop	Amazon
	General Specs
Family	Athlon MP
Locked	Yes
Frequency	2,133 MHz
Bus type	FSB
Bus speed	133 MHz
Bus rate	266 MT/s
Clock multiplier	16
CPUID	6A0
	Microarchitecture
Microarchitecture	K7
Platform	Athlon MP
Chipset	AMD-760MP
Core Name	Barton
Core Family	6
Core Model	10
Core Stepping	0, 1
Process	130 nm
Transistors	54,300,000
Technology	CMOS
Die	101 mm²
Word Size	32 bit
Cores	1
Threads	1
Max Memory	4 GiB
	Multiprocessing
Max SMP	2-Way (Multiprocessor)
	Electrical
Vcore	1.6 V
TDP	60 W
TDP (Typical)	47.2 W
Tjunction	0 °C – 90 °C
Tcase	0 °C – 90 °C
Tstorage	-40 °C – 100 °C
	Packaging
Package	OPGA-453 (PGA)
Dimension	49.53 mm x 49.53 mm x 1.942 mm
Pitch	1.27 mm
Pins	453
Interconnect	Socket A (PGA-462)

Latest revision as of 14:20, 13 December 2017

Athlon MP 2800+' (OPN AMSN2800DUT4C) based on the last-generation Barton core was a 32-bit x86 multiprocessor developed by AMD and introduced in early 2003 for the server and workstation market. This MPU, which operated at 2.13 GHz with a FSB transfer rate of 266 MT/s (x16 multiplier), was manufactured on a newer 130 nm process.

Cache[edit]

Main article: K7 § Cache

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

128 KiB

131,072 B
0.125 MiB

L1I$	64 KiB 65,536 B 0.0625 MiB	1x64 KiB	2-way set associative
L1D$	64 KiB 65,536 B 0.0625 MiB	1x64 KiB	2-way set associative

L2$

512 KiB

0.5 MiB
524,288 B
4.882812e-4 GiB

		1x512 KiB	16-way set associative

Graphics[edit]

This MPU has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
EMMX	Extended MMX Extension
3DNow!	3DNow! Extension
E3DNow!	Extended 3DNow! Extension
SSE	Streaming SIMD Extensions

x86-16	16-bit x86
x86-32	32-bit x86
Real	Real Mode
Protected	Protected Mode
SMM	System Management Mode
FPU	Integrated x87 FPU
SmartMP	SmartMP Technology

Advanced Configuration and Power Interface
- Halt State
- Stop Grant State

Documents[edit]

Datasheets[edit]

AMD Athlon MP Processor Model 10 Data Sheet for Multiprocessor Platforms; Publication # 26426 Rev. C; Issue Date: October 2003.

Others[edit]

System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors; Publication # 25325; Rev: B; August 2002.

@@ Line 1: / Line 1: @@
 {{amd title|Athlon MP 2800+}}
-{{mpu
+{{chip
 | name                = AMD Athlon MP 2800+
 | no image            = yes
@@ Line 47: / Line 47: @@
 | max memory          = 4 GiB
-| electrical          = Yes
 | v core              = 1.6 V
 | v core tolerance    =
@@ Line 62: / Line 62: @@
 | tstorage max        = 100 °C
-| packaging           = Yes
+|package module 1={{packages/amd/pga-453}}
-| package 0           = OPGA-453
-| package 0 type      = OPGA
-| package 0 pins      = 453
-| package 0 pitch     = 1.27 mm
-| package 0 width     = 49.53 mm
-| package 0 length    = 49.53 mm
-| package 0 height    = 1.942
-| socket 0            = Socket A
-| socket 0 type       = PGA-462
 }}
-'''Athlon MP 2800+'''' (OPN ''AMSN2800DUT4C'') based on the last-generation {{amd|Barton|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in early [[2003]] for the server and workstation market. This MPU operated at 2.13 GHz with a FSB transfer rate of 266 MT/s (x16 multiplier), was manufactured on a newer [[130 nm process]].
+'''Athlon MP 2800+'''' (OPN ''AMSN2800DUT4C'') based on the last-generation {{amd|Barton|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in early [[2003]] for the server and workstation market. This MPU, which operated at 2.13 GHz with a FSB transfer rate of 266 MT/s (x16 multiplier), was manufactured on a newer [[130 nm process]].
 == Cache ==
 {{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
-{{cache info
+{{cache size
+|l1 cache=128 KiB
 |l1i cache=64 KiB
 |l1i break=1x64 KiB
 |l1i desc=2-way set associative
-|l1i extra=
+|l1i policy=
 |l1d cache=64 KiB
 |l1d break=1x64 KiB
 |l1d desc=2-way set associative
-|l1d extra=
+|l1d policy=
 |l2 cache=512 KiB
 |l2 break=1x512 KiB
 |l2 desc=16-way set associative
-|l2 extra=
+|l2 policy=
-|l3 cache=
+}}
-|l3 break=
-|l3 desc=
+== Graphics ==
-|l3 extra=
+This MPU has no integrated graphics processing unit.
+== Features ==
+{{x86 features
+|real=Yes
+|protected=Yes
+|smm=Yes
+|fpu=Yes
+|x8616=Yes
+|x8632=Yes
+|x8664=No
+|nx=No
+|3dnow=Yes
+|e3dnow=Yes
+|mmx=Yes
+|emmx=Yes
+|sse=Yes
+|sse2=No
+|sse3=No
+|ssse3=No
+|sse41=No
+|sse42=No
+|sse4a=No
+|avx=No
+|avx2=No
+|abm=No
+|tbm=No
+|bmi1=No
+|bmi2=No
+|fma3=No
+|fma4=No
+|aes=No
+|rdrand=No
+|sha=No
+|xop=No
+|adx=No
+|clmul=No
+|f16c=No
+|tbt1=No
+|tbt2=No
+|tbmt3=No
+|bpt=No
+|eist=No
+|flex=No
+|isrt=No
+|mwt=No
+|sipp=No
+|att=No
+|ipt=No
+|tsx=No
+|txt=No
+|ht=No
+|vpro=No
+|vtx=No
+|vtd=No
+|ept=No
+|mpx=No
+|sgx=No
+|securekey=No
+|osguard=No
+|smartmp=Yes
+|powernow=No
+|amdv=No
+|rvi=No
 }}
+* Advanced Configuration and Power Interface [[has feature::ACPI| ]]
+** [[has feature::Halt State]]
+** [[has feature::Stop Grant State]]
+== Documents ==
+=== Datasheets ===
+* [[:File:AMD Athlon MP Processor Model 10 Data Sheet for Multiprocessor Platforms.pdf|AMD Athlon MP Processor Model 10 Data Sheet for Multiprocessor Platforms]]; Publication # 26426 Rev. C; Issue Date: October 2003.
+=== Others ===
+* [[:File:System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Athlon MP 2800+ - AMD#package +
base frequency	2,133 MHz (2.133 GHz, 2,133,000 kHz) +
bus rate	266 MT/s (0.266 GT/s, 266,000 kT/s) +
bus speed	133 MHz (0.133 GHz, 133,000 kHz) +
bus type	FSB +
chipset	AMD-760MP +
clock multiplier	16 +
core count	1 +
core family	6 +
core model	10 +
core name	Barton +
core stepping	0 + and 1 +
core voltage	1.6 V (16 dV, 160 cV, 1,600 mV) +
cpuid	6A0 +
designer	AMD +
die area	101 mm² (0.157 in², 1.01 cm², 101,000,000 µm²) +
family	Athlon MP +
first announced	May 6, 2003 +
first launched	May 6, 2003 +
full page name	amd/athlon mp/amsn2800dut4c +
has amd smartmp technology	true +
has feature	SmartMP Technology +, ACPI +, Halt State + and Stop Grant State +
has locked clock multiplier	true +
has multiprocessing support	true +
instance of	microprocessor +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	2-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	2-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	16-way set associative +
l2$ size	0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
ldate	May 6, 2003 +
manufacturer	AMD +
market segment	Server +
max case temperature	363.15 K (90 °C, 194 °F, 653.67 °R) +
max cpu count	2 +
max junction temperature	363.15 K (90 °C, 194 °F, 653.67 °R) +
max memory	4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitecture	K7 +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	233.15 K (-40 °C, -40 °F, 419.67 °R) +
model number	Athlon MP 2800+ +
name	AMD Athlon MP 2800+ +
package	OPGA-453 +
part number	AMSN2800DUT4C +
platform	Athlon MP +
process	130 nm (0.13 μm, 1.3e-4 mm) +
release price	$ 275.00 (€ 247.50, £ 222.75, ¥ 28,415.75) +
smp max ways	2 +
tdp	60 W (60,000 mW, 0.0805 hp, 0.06 kW) +
tdp (typical)	47.2 W (47,200 mW, 0.0633 hp, 0.0472 kW) +
technology	CMOS +
thread count	1 +
transistor count	54,300,000 +
word size	32 bit (4 octets, 8 nibbles) +

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