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Difference between revisions of "2004"

 
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{{year|year=2004}}
 
In '''2004''':
 
In '''2004''':
  
 
* May 7: [[Intel]] acknowledges they've reached a "thermal wall" on their microprocessors; new emphasis on multi-core.
 
* May 7: [[Intel]] acknowledges they've reached a "thermal wall" on their microprocessors; new emphasis on multi-core.
* May 7: Intel cancels {{intel|Tejas}} and {{intel|Jayhawk}}.
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* May 7: Intel cancels {{intel|Enhanced NetBurst|l=arch}} ({{intel|Tejas|l=core}} and {{intel|Jayhawk|l=core}} cores).
 
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* May 24: AMD announces the {{amd|Geode NX}} family of performance embedded processors based on the {{amd|Thoroughbred|l=core}} core
 
* July 15: [[Embedded C]] first technical report ([[ISO/IEC TR 18037:2004]]) is published.
 
* July 15: [[Embedded C]] first technical report ([[ISO/IEC TR 18037:2004]]) is published.
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* July 28: AMD introduces the {{amd|Sempron}} family.
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* September 13: [[Cavium]] announces their first completely in-home designed {{cavium|cnMIPS|l=arch}} microarchitecture. A first implementation of the MIPS64 Revision 2 ISA.
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* September 13: [[Cavium]] announces the {{cavium|OCTEON}} family of multi-core network processors.

Latest revision as of 21:53, 27 November 2017

2004
Unix Time1072915200 - 1104537599
Years

In 2004:

  • May 7: Intel acknowledges they've reached a "thermal wall" on their microprocessors; new emphasis on multi-core.
  • May 7: Intel cancels Enhanced NetBurst (Tejas and Jayhawk cores).
  • May 24: AMD announces the Geode NX family of performance embedded processors based on the Thoroughbred core
  • July 15: Embedded C first technical report (ISO/IEC TR 18037:2004) is published.
  • July 28: AMD introduces the Sempron family.
  • September 13: Cavium announces their first completely in-home designed cnMIPS microarchitecture. A first implementation of the MIPS64 Revision 2 ISA.
  • September 13: Cavium announces the OCTEON family of multi-core network processors.