Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "intel/core i5/i5-9500"
| Line 18: | Line 18: | ||
|technology=CMOS | |technology=CMOS | ||
|word size=64 bit | |word size=64 bit | ||
| + | |core count=8 | ||
| + | |thread count=8 | ||
|max cpus=1 | |max cpus=1 | ||
| + | |max memory=64 GiB | ||
}} | }} | ||
'''Core i5-9500''' is a planned {{arch|64}} mid-range performance [[x86]] desktop processor by [[Intel]] set to be introduced in [[2018]]. The i5-9400 is fabricated on Intel's 2nd generation [[10 nm process|10nm+ process]] based on the {{intel|Ice Lake|l=arch}} microarchitecture. | '''Core i5-9500''' is a planned {{arch|64}} mid-range performance [[x86]] desktop processor by [[Intel]] set to be introduced in [[2018]]. The i5-9400 is fabricated on Intel's 2nd generation [[10 nm process|10nm+ process]] based on the {{intel|Ice Lake|l=arch}} microarchitecture. | ||
Revision as of 22:51, 24 November 2017
Template:mpu Core i5-9500 is a planned 64-bit mid-range performance x86 desktop processor by Intel set to be introduced in 2018. The i5-9400 is fabricated on Intel's 2nd generation 10nm+ process based on the Ice Lake microarchitecture.
 |
Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release. |