Semiconductor & Computer Engineering
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Difference between revisions of "hisilicon/k3"
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Revision as of 12:47, 6 September 2017
| K3 | |
| Developer | HiSilicon, ARM Holdings |
| Manufacturer | TSMC |
| Type | Sysstem on chips |
| Introduction | 2008 (announced) |
| ISA | ARMv5 |
| µarch | ARM9 |
| Word size | 32 bit 4 octets
8 nibbles |
| Process | 0.18 µm 180 nm , 40 nm1.8e-4 mm 0.04 μm
4.0e-5 mm |
| Technology | CMOS |
| Succession | |
| → | |
| Kirin | |
K3 was a family of 32-bit ARM mobile SoCs introduced by HiSilicon since 2008.
Overview
K3 was a family of high-performance mobile ARM system on chips designed by HiSilicon. Introduced in 2008, those chips were designed for high-performance smartphones and tablets primarily. Most of those chips were used heavily, although not exclusively, by Huawei own consumer electronics. K3 was HiSilicon's first series to directly target the mobile performance market. In late 2013, HiSilicon replaced the K3 family by the Kirin family and expanded their portfolio into mid-range performance models.
Members
| List of K3 Processors | |||||||||
|---|---|---|---|---|---|---|---|---|---|
| Main processor | Integrated Graphics | ||||||||
| Model | Launched | Transistors | Cores | Frequency | Cores | ISA | Designer | Name | Frequency |
| K3V1 | June 2008 | 200,000,000 | 1 | 0.46 GHz 460 MHz 460,000 kHz | ARM926EJ-S | ARMv5 | |||
| K3V2 | 26 February 2012 | 600,000,000 | 4 | 1.5 GHz 1,500 MHz 1,500,000 kHz | Cortex-A9 | ARMv7 | Vivante | GC4000 | 480 MHz 0.48 GHz 480,000 KHz |
| K3V2E | 2013 | 600,000,000 | 4 | 1.5 GHz 1,500 MHz 1,500,000 kHz | Cortex-A9 | ARMv7 | Vivante | GC4000 | 480 MHz 0.48 GHz 480,000 KHz |
| Count: 3 | |||||||||
See also
- MediaTek Helio
Facts about "K3 - HiSilicon"
| designer | HiSilicon + and ARM Holdings + |
| first announced | 2008 + |
| full page name | hisilicon/k3 + |
| instance of | integrated circuit family + |
| instruction set architecture | ARMv5 + |
| main designer | HiSilicon + |
| manufacturer | TSMC + |
| microarchitecture | ARM9 + |
| name | K3 + |
| process | 180 nm (0.18 μm, 1.8e-4 mm) + and 40 nm (0.04 μm, 4.0e-5 mm) + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + |