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Difference between revisions of "ibm/microarchitectures/z14"
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* [[14 nm process]] (from [[22 nm process|22 nm]]) | * [[14 nm process]] (from [[22 nm process|22 nm]]) | ||
* Higher clock frequency (5.2 GHz from 5 GHz) | * Higher clock frequency (5.2 GHz from 5 GHz) | ||
| + | * Higher scalability | ||
| + | ** Up to 170-way multiprocessing (from 141-way) | ||
* Core | * Core | ||
** Improved Operand Store Compare (OSC) prediction | ** Improved Operand Store Compare (OSC) prediction | ||
| Line 33: | Line 35: | ||
** L3$ increased to 128 MiB/CP (from 64 MiB/CP; 100% increase) | ** L3$ increased to 128 MiB/CP (from 64 MiB/CP; 100% increase) | ||
** New 672 MiB/drawer of shared L4 | ** New 672 MiB/drawer of shared L4 | ||
| + | |||
| + | * Central Processor Assist for Cryptographic Function (CPACF) | ||
| + | ** Dedicated co-processor for each core | ||
| + | ** Claims 6x faster encryption functions (vs. z13) | ||
| + | *** 4x Advanced Encryption Standard (AES) speedup | ||
| + | ** Support for [[True Random Number Generator]] | ||
| + | ** New support for [[SHA-3]] standard | ||
| + | |||
{{expand section}} | {{expand section}} | ||
Revision as of 12:33, 20 July 2017
| Edit Values | |
| z14 µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | IBM |
| Manufacturer | GlobalFoundries |
| Introduction | July 17, 2017 |
| Process | 14 nm |
| Pipeline | |
| Type | Superscalar, Pipelined |
| Instructions | |
| ISA | z/Architecture |
| Succession | |
z14 was a z/Architecture-based microarchitecture designed by IBM and introduced in 2017 for their z14 processors and mainframes. The z14 microarchitecture replaced the z13.
Process Technology
z14-based microprocessors are manufactured on GlobalFoundries's 14 nm FinFET Silicon-On-Insulator (SOI).
Architecture
Key changes from z13
- 14 nm process (from 22 nm)
- Higher clock frequency (5.2 GHz from 5 GHz)
- Higher scalability
- Up to 170-way multiprocessing (from 141-way)
- Core
- Improved Operand Store Compare (OSC) prediction
- Faster branch wakeup
- Improved instruction delivery
- Cache
- New directory design
- Power efficient
- L1I$ increased to 128 KiB/core (from 96 KiB/core; 33% increase)
- L2D$ increased to 4 MiB/core (from 2 MiB/core; 100% increase)
- L3$ increased to 128 MiB/CP (from 64 MiB/CP; 100% increase)
- New 672 MiB/drawer of shared L4
- New directory design
- Central Processor Assist for Cryptographic Function (CPACF)
- Dedicated co-processor for each core
- Claims 6x faster encryption functions (vs. z13)
- 4x Advanced Encryption Standard (AES) speedup
- Support for True Random Number Generator
- New support for SHA-3 standard
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This section requires expansion; you can help adding the missing info. |
Overview
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Die
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Facts about "z14 - Microarchitectures - IBM"
| codename | z14 + |
| designer | IBM + |
| first launched | July 17, 2017 + |
| full page name | ibm/microarchitectures/z14 + |
| instance of | microarchitecture + |
| instruction set architecture | z/Architecture + |
| manufacturer | GlobalFoundries + |
| microarchitecture type | CPU + |
| name | z14 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |