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Difference between revisions of "intel/cores/clarksfield"
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'''Clarksfield''' is the core name given by [[Intel]] for their first generation ({{intel|Nehalem|l=arch}}-based) high-performance mobile processors. These chips are manufactured on a [[45 nm process]] and uses {{intel|PM55}} Express [[chipset]]. These MPUs introduce a number of new features.
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== Features ==
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* [[45 nm process]]
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* {{intel|PM55}} Express [[chipset]] ({{intel|Calpella}} platform)
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* 4 Cores, 8 Threads
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* 2.5 GT/s DMI 1.0
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* 8 GB Maximum Memory (DDR3-1333)
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* Support everything up to SSE4.2 ({{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}})
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* Supports {{intel|Hyper-Threading}}, {{intel|VT-x}}, {{intel|VT-d}}, {{intel|EPT}}, {{intel|TBT 1.0}}, and {{intel|TXT}}

Revision as of 19:39, 26 November 2016

Edit Values
Clarksfield
no photo (ic).svg
General Info
DesignerIntel
ManufacturerIntel
IntroductionJune 24, 2009 (announced)
September 23, 2009 (launched)
Microarchitecture
ISAx86-64
MicroarchitectureNehalem
Word Size
8 octets
16 nibbles
64 bit
Process45 nm
0.045 μm
4.5e-5 mm
TechnologyCMOS
Clock1.60 GHz - 2.13 GHz
Succession

Clarksfield is the core name given by Intel for their first generation (Nehalem-based) high-performance mobile processors. These chips are manufactured on a 45 nm process and uses PM55 Express chipset. These MPUs introduce a number of new features.

Features

designerIntel +
first announcedJune 24, 2009 +
first launchedSeptember 23, 2009 +
instance ofcore +
isax86-64 +
manufacturerIntel +
microarchitectureNehalem +
nameClarksfield +
process45 nm (0.045 μm, 4.5e-5 mm) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +