Semiconductor & Computer Engineering
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== Models == | == Models == | ||
| − | {{ | + | |
| + | === {{amd|Palomino|l=core}} Core === | ||
| + | Palomino-based microprocessors were manufactured on AMD's mature [[180 nm process]] copper interconnect technology at Fab 30 foundry in [[wikipedia:Dresden, Germany|Dresden, Germany]]. The core implements an exclusive 256 [[KiB]] [[L2$]] and a 128 KiB [[L1$]]. As with all [[Socket A]] processors ({{decc|EV6}} system bus), Athlon MP operate on a 133 MHz FSB DDR (double data rate) yielding an effective 266 MT/s transfer rate. These processors support {{x86|MMX}}, {{x86|SSE}}, {{x86|Enhanced 3DNow!}}, and {{amd|SmartMP Technology}}. AMD came short with Palomino by not supporting {{x86|SSE2}} which came out in the various {{intel|Pentium 4}} that were released by [[Intel]] around the same time. | ||
== Documents == | == Documents == | ||
Revision as of 20:41, 16 November 2016
| Athlon MP | |
| |
| Athlon MP logo | |
| Developer | AMD |
| Manufacturer | AMD |
| Type | Microprocessors |
| Introduction | June 5, 2001 (announced) October 9, 2001 (launch) |
| Architecture | Server x86 multiprocessors |
| ISA | x86 |
| µarch | K7 |
| Word size | 32 bit 4 octets
8 nibbles |
| Process | 180 nm 0.18 μm , 130 nm1.8e-4 mm 0.13 μm
1.3e-4 mm |
| Technology | CMOS |
| Clock | 1,000 MHz-2,130 MHz |
| Package | CPGA-453 |
| Socket | Socket A |
| Succession | |
| ← | → |
| Athlon | Opteron |
Athlon MP (Athlon Multiprocessor) was a family of 32-bit x86 server multiprocessors designed by AMD specifically for the server and workstations market. Athlon MP was AMD's first multiprocessing-capable platform.
Overview
AMD announced their first multiprocessing-capable platform at Computex Taipei on June 5th, 2001. The platform includes the Athlon MP processors as well as the AMD-760MP northbridge chipset. AMD-760MP supports one- and two-way setups and Double Data Rate (DDR) memory operating at 133 MHz. At the time, AMD's vice president for their servers group stated Athlon MP processor delivers up to 38% higher performance over their competition (presumably referring to Xeon).
Models
Palomino Core
Palomino-based microprocessors were manufactured on AMD's mature 180 nm process copper interconnect technology at Fab 30 foundry in Dresden, Germany. The core implements an exclusive 256 KiB L2$ and a 128 KiB L1$. As with all Socket A processors (EV6 system bus), Athlon MP operate on a 133 MHz FSB DDR (double data rate) yielding an effective 266 MT/s transfer rate. These processors support MMX, SSE, Enhanced 3DNow!, and SmartMP Technology. AMD came short with Palomino by not supporting SSE2 which came out in the various Pentium 4 that were released by Intel around the same time.
Documents
Datasheets
- AMD Athlon MP Processor Model 6 Data Sheet Multiprocessor-Capable for Workstation and Server Platforms; Publication # 24685; Rev.: B; Issue Date: June 2001.
- AMD Athlon MP Processor Model 6 OPGA Data Sheet for Multiprocessor Platforms; Publication # 25480 Rev: D; Issue Date: June 2002.
- AMD Athlon MP Processor Model 8 Data Sheet for Multiprocessor Platforms; Publication # 25722 Rev. E; Issue Date: March 2003.
- AMD Athlon MP Processor Model 10 Data Sheet for Multiprocessor Platforms; Publication # 26426 Rev. C; Issue Date: October 2003.
Others
- System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors; Publication # 25325; Rev: B; August 2002.
| designer | AMD + |
| first announced | June 5, 2001 + |
| first launched | October 9, 2001 + |
| full page name | amd/athlon mp + |
| instance of | microprocessor family + |
| instruction set architecture | x86 + |
| main designer | AMD + |
| manufacturer | AMD + |
| microarchitecture | K7 + |
| name | Athlon MP + |
| package | CPGA-453 + |
| process | 180 nm (0.18 μm, 1.8e-4 mm) + and 130 nm (0.13 μm, 1.3e-4 mm) + |
| socket | Socket A + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + |