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Difference between revisions of "intel/microarchitectures/ice lake (client)"
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'''Icelake''' is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Cannonlake}}. Icelake is expected to be fabricated using a [[10 nm process]]. Icelake is the "Architecture" microarchitecture as part of Intel's {{intel|PAO}} model. | '''Icelake''' is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Cannonlake}}. Icelake is expected to be fabricated using a [[10 nm process]]. Icelake is the "Architecture" microarchitecture as part of Intel's {{intel|PAO}} model. | ||
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+ | == Process Technology== | ||
+ | {{main|intel/microarchitectures/cannonlake#Process_Technology|l1=Cannonlake § Process Technology}} | ||
+ | Tigerlake is set to use the same [[10 nm process]] that was designed for Cannonlake. |
Revision as of 07:01, 16 September 2016
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Icelake µarch | |
General Info |
Icelake is a planned microarchitecture by Intel as a successor to Cannonlake. Icelake is expected to be fabricated using a 10 nm process. Icelake is the "Architecture" microarchitecture as part of Intel's PAO model.
Process Technology
- Main article: Cannonlake § Process Technology
Tigerlake is set to use the same 10 nm process that was designed for Cannonlake.