Semiconductor & Computer Engineering
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Difference between revisions of "intel/microarchitectures/tiger lake"
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| designer = Intel | | designer = Intel | ||
| manufacturer = Intel | | manufacturer = Intel | ||
| − | | introduction = | + | | introduction = 2019 |
| phase-out = | | phase-out = | ||
| − | | process = | + | | process = 10 nm |
| succession = Yes | | succession = Yes | ||
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| successor link = | | successor link = | ||
}} | }} | ||
| − | '''Tigerlake''' is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Icelake}}. Tigerlake is expected to be fabricated using a | + | '''Tigerlake''' is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Icelake}}. Tigerlake is expected to be fabricated using a [[10 nm process]]. |
Revision as of 02:33, 3 August 2016
| Edit Values | |
| Tigerlake µarch | |
| General Info |
Tigerlake is a planned microarchitecture by Intel as a successor to Icelake. Tigerlake is expected to be fabricated using a 10 nm process.