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Difference between revisions of "intel/tick-tock"
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− | ! colspan="4" | Intel Tick-Tock Schedule | + | ! colspan="4" style="background:#D6D6FF;" | Intel Tick-Tock Schedule |
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!Cycle !! [[technology node|Process]] !! Introduction !! Microarchitecture | !Cycle !! [[technology node|Process]] !! Introduction !! Microarchitecture |
Revision as of 02:25, 3 August 2016
Tick-Tock was an aggressive development model introduced by Intel for their mainstream microprocessors in 2005 and phased out in 2016 whereby microarchitecture changes were in-sync with their process shrink. Under the tick-tock scheme roughly every 12-18 months the Intel alternated between "Tick" and "Tock". Intel no longer uses this model, instead they use the Process-Architecture-Optimization (PAO).
Under the Tick-Tock Model:
- Tick - With each tick, Intel advances their manufacturing process technology in line with Moore's Law. Each new process introduces higher transistor density and a generally a plethora of other advantages such as higher performance and lower power consumption. During a tick, Intel retrofits their previous microarchitecture to the new process which inherently yielded better performance and energy saving. During a tick, usually just a few features and improvements and new instructions are introduced.
- Tock - With each tock, Intel uses the their latest manufacturing process technology from their "tick" to manufacture a newly designed microarchitecture. The new microarchitecture is designed with the new process in mind and typically introduces Intel's newest big features and functionalities.
Schedule
Intel Tick-Tock Schedule | |||
---|---|---|---|
Cycle | Process | Introduction | Microarchitecture |
Tick | 65 nm | 2006 | Core |
Tick | 45 nm | 2007 | Penryn |
Tock | 45 nm | 2008 | Nehalem |
Tick | 32 nm | 2009 | Westmere |
Tock | 32 nm | 2010 | Sandy Bridge |
Tick | 22 nm | 2011 | Ivy Bridge |
Tock | 22 nm | 2013 | Haswell |
Tick | 14 nm | 2014 | Broadwell |
Tock | 14 nm | 2015 | Skylake |