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Difference between revisions of "nvidia"

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== CPU Families ==
 
== CPU Families ==
 +
:; {{\|GoForce}}
 +
:* GoForce
 +
 
{{collist
 
{{collist
−
| count = 2
+
| count = 3
 
| width = 200px
 
| width = 200px
 
|
 
|
−
* {{\|Tegra}}
+
:; {{\|Tegra}}
−
* {{\|GoForce}}
+
* {{nvidia|tegra/2|Tegra 2}} • AP20H/AP25/T20/T25 (VEC4)
 +
* {{nvidia|tegra/3|Tegra 3}} (Kal-El) • T30/T30L/T33/AP33
 +
* {{nvidia|tegra/4|Tegra 4}} (Wayne) • T114 (VEC4)
 +
* {{nvidia|tegra/4i|Tegra 4i}} (Grey) • T148? (VEC4)
 +
* {{nvidia|tegra/k1|Tegra K1}} (Logan) • T124 • T132 ({{nvidia|Denver|l=arch}})
 +
* {{nvidia|tegra/x1|Tegra X1}} (Erista) • T210 (Maxwell)
 +
* {{nvidia|tegra/x1+|Tegra X1+}} (Mariko) • T214 (Maxwell)
 +
* {{nvidia|tegra/x2|Tegra X2}} (Parker) • T186 ({{nvidia|Denver|l=arch}} 2)
 +
* {{nvidia|tegra/xavier|Tegra Xavier}} • T194 ({{nvidia|Carmel|l=arch}}/Volta)
 +
* {{nvidia|tegra/orin|Tegra Orin}} • T234 (Hercules) • T239 (Drake)
 +
* {{nvidia|tegra/grace|Tegra Grace}} • T241 ([[Neoverse]] V2)
 +
* {{nvidia|tegra/thor|Tegra Thor}} • T264? ([[Neoverse]] V3AE)
 
}}
 
}}
 +
{{clear}}
 +
<!--
 +
<pre>
 +
Orin • T234 • GPU: "Ampere"; CPU: 12x ARM Cortex-A78AE (Hercules)
 +
Grace • T241 • GPU: "Hopper"; CPU: 72x ARM Neoverse V2 cores (AI & HPC)
 +
Atlan • T254? • GPU: "Ada Lovelace"; CPU: Grace-Nex, cancelled model 2022
 +
Thor • T264? • GPU: "Blackwell"; CPU: ARM Neoverse V3AE
 +
Series/Generation
 +
Tegra 2
 +
Tegra 3 (Kal-El)
 +
Tegra 4 (Wayne)
 +
Tegra 4i (Grey)
 +
Tegra K1 (Logan)
 +
Tegra X1 (Erista)
 +
Tegra X1+ (Mariko)
 +
Tegra X2 (Parker)
 +
Tegra Xavier
 +
Tegra Orin
 +
Tegra Thor
 +
CPU • Model/Device
 +
AP20H/AP25/T20/T25 • T30/T30L/AP33/T33 • T114 • T148? • T124 • T132 • T210 • T214 • T186 • T194 • T234 • T264?
 +
 +
{| class="wikitable" cellpadding="3px" style="border: 1px solid black; border-spacing: 0px; width: 100%; text-align:center;"
 +
|+ Tegra Models comparison
 +
! colspan="2" |Series /<br>Generation
 +
!Tegra 2
 +
!Tegra 3<br>(''Kal-El'')
 +
!Tegra 4<br>(''Wayne'')
 +
!Tegra 4i<br>(''Grey'')
 +
! colspan="2" |Tegra K1<br>(''Logan/Stark'')+
 +
!Tegra X1/X1+<br>(''Erista/Mariko'')
 +
!Tegra X2<br>(''Parker'')
 +
!Tegra <br>''Xavier''
 +
!Tegra <br>''Orin''
 +
|-
 +
! colspan="2" |Model /<br>Device
 +
|AP25/T25
 +
|T30/T30L<br>AP33/T33
 +
|T114
 +
|T148?
 +
|T124
 +
|T132
 +
|T210/T214
 +
|T186
 +
|T194<br>(AGX/NX)
 +
|T234
 +
|
 +
|-
 +
</pre>
 +
-->
  
 
== Microarchitectures ==
 
== Microarchitectures ==
 
{{collist
 
{{collist
−
| count = 2
+
| count = 4
 
|
 
|
 
'''GPUs:'''
 
'''GPUs:'''
Line 110: Line 174:
 
* {{nvidia|Turing|l=arch}}
 
* {{nvidia|Turing|l=arch}}
 
* {{nvidia|Ampere|l=arch}}
 
* {{nvidia|Ampere|l=arch}}
 +
 
* {{nvidia|Hopper|l=arch}}
 
* {{nvidia|Hopper|l=arch}}
 
* {{nvidia|Blackwell|l=arch}}
 
* {{nvidia|Blackwell|l=arch}}
 +
* ''{{nvidia|Celsius|l=arch}}''
 +
* ''{{nvidia|Curie|l=arch}}''
 +
* ''{{nvidia|Kelvin|l=arch}}''
 +
* ''{{nvidia|Rankine|l=arch}}''
 +
* ''{{nvidia|Ada Lovelace|l=arch}}''
 +
* ''{{nvidia|Rubin|l=arch}}''
 +
 
'''CPU:'''
 
'''CPU:'''
 
:'''ARM:'''
 
:'''ARM:'''
Line 117: Line 189:
 
* {{nvidia|Denver 2|l=arch}}
 
* {{nvidia|Denver 2|l=arch}}
 
* {{nvidia|Carmel|l=arch}}
 
* {{nvidia|Carmel|l=arch}}
 +
*  {{nvidia|Tegra|l=arch}}
 
:'''RISC-V:'''
 
:'''RISC-V:'''
 
* {{nvidia|NV-RISCV|l=arch}}
 
* {{nvidia|NV-RISCV|l=arch}}
Line 122: Line 195:
 
* {{nvidia|NVDLA|l=arch}}
 
* {{nvidia|NVDLA|l=arch}}
 
}}
 
}}
 +
 +
== Comparison ==
 +
:;Tegra
 +
{|class="wikitable" style="font-size: 95%; text-align: center;"
 +
|+
 +
! colspan="2" |Generation
 +
!Tegra 2
 +
!Tegra 3
 +
!Tegra 4
 +
!Tegra 4i
 +
! colspan="2" |Tegra K1
 +
!Tegra X1
 +
!Tegra X1+
 +
!Tegra X2
 +
!Xavier
 +
!Orin
 +
!Thor
 +
|-
 +
! rowspan="5" |CPU
 +
!Instruction <br>set
 +
| colspan="5" |[[ARMv7|ARMv7&#8209;A]] <br>(32&#8209;bit)
 +
| colspan="4" |[[ARMv8|ARMv8&#8209;A]] <br>(64&#8209;bit)
 +
| colspan="2" |[[ARMv8|ARMv8.2&#8209;A]] <br>(64&#8209;bit)
 +
| [[ARMv9|ARMv9.2&#8209;A]] <br>(64&#8209;bit)
 +
|-
 +
!Cores
 +
|2x ARM <br>Cortex-A9
 +
|4+1x ARM <br>Cortex-A9
 +
|4+1x ARM <br>Cortex-A15
 +
|4+1x ARM <br>Cortex-A9
 +
|4+1x ARM <br>Cortex-A15
 +
|2x <br>'''{{nvidia|Denver|l=arch}}'''
 +
| colspan="2" |4x ARM Cortex-A53 <br>(disabled) +<br>4x ARM Cortex-A57
 +
|2x '''{{nvidia|Denver|l=arch}}'''2 <br>+ 4x ARM <br>Cortex-A57
 +
|8x <br>'''{{nvidia|Carmel|l=arch}}'''
 +
|12x <br>Cortex<br>-A78AE
 +
|'''[[Neoverse]]''' <br>V3AE
 +
|-
 +
!L1 cache (I/D)
 +
| colspan="5" |32/32KB
 +
|128/64KB
 +
| colspan="2" |32/32KB <br>+ 64/32KB
 +
|128/64KB <br>+ 48/32KB
 +
|128/64KB
 +
| colspan="2" |64/64KB
 +
|-
 +
!L2 cache
 +
| colspan="2" |1 MB
 +
| colspan="4" |2 MB
 +
| colspan="2" |128KB <br>+ 2MB
 +
|2MB <br>+ 2MB
 +
|8 MB
 +
|3 MB
 +
| colspan="1" style="text-align:center;" |?
 +
|-
 +
!L3 cache
 +
| colspan="9" |N/A
 +
|4 MB
 +
|6 MB
 +
| colspan="2" style="text-align:center;" |?
 +
|-
 +
! rowspan="4" |GPU
 +
! Architecture
 +
| colspan="4" |{{nvidia|Vec4|l=arch}}
 +
| colspan="2" |{{nvidia|Kepler|l=arch}}
 +
| colspan="2" |{{nvidia|Maxwell|l=arch}}
 +
|{{nvidia|Pascal|l=arch}}
 +
|{{nvidia|Volta|l=arch}}
 +
|{{nvidia|Ampere|l=arch}}
 +
|{{nvidia|Blackwell|l=arch}}
 +
|-
 +
!CUDA cores
 +
|4+4*
 +
|8+4*
 +
|48+24*
 +
|48+12*
 +
| colspan="2" |192
 +
| colspan="3" |256
 +
|512
 +
|2048
 +
|?
 +
|-
 +
!Tensor cores
 +
| colspan="9" |N/A
 +
| colspan="2" |64
 +
|?
 +
|-
 +
!RT cores
 +
| colspan="10" |N/A
 +
|8
 +
|?
 +
|-
 +
! rowspan="3" |RAM
 +
!Protocol
 +
|DDR2/ <br>LPDDR2
 +
|DDR3/ <br>LPDDR2
 +
| colspan="4" |DDR3/ <br>LPDDR3
 +
|LPDDR3/ <br>LPDDR4
 +
| colspan="3" |LPDDR4/ <br>LPDDR4X
 +
|LPDDR5
 +
|?
 +
|-
 +
!Max. size
 +
|1&nbsp;GB
 +
|2&nbsp;GB
 +
| colspan="2" |4&nbsp;GB
 +
| colspan="5" |8&nbsp;GB
 +
| colspan="2" |64&nbsp;GB
 +
|128&nbsp;GB
 +
|-
 +
!Bandwidth
 +
|2.7 GB/s
 +
| colspan="2" |6.4 GB/s
 +
|7.5 GB/s
 +
| colspan="2" |14.9 GB/s
 +
|25.6 <br>GB/s
 +
|34.1 <br>GB/s
 +
|59.7 <br>GB/s
 +
|136.5 <br>GB/s
 +
|204.8 <br>GB/s
 +
|?
 +
|-
 +
! colspan="2" |Process
 +
| colspan="2" |[[40 nm]]
 +
| colspan="4" |[[28 nm]]
 +
|[[20 nm]]
 +
| colspan="2" |[[16 nm]]
 +
|[[12 nm]]
 +
|[[8 nm]]
 +
|[[4 nm]]
 +
|-
 +
|}
 +
* [[VLIW]]-based Vec4: Pixel shaders + Vertex shaders. Since Kepler, Unified shaders are used.
  
 
== Technology ==
 
== Technology ==
 
* {{\\|NVLink}}
 
* {{\\|NVLink}}
 
* {{\\|NVSwitch}}
 
* {{\\|NVSwitch}}

Latest revision as of 08:55, 23 March 2025

NVIDIA
nvidia logo.svg
Type Public
Founded 1993
Founder Jen-Hsun Huang
Chris Malachowsky
Curtis Priem
Headquarters Santa Clara, California
Website http://www.nvidia.com

NVIDIA Corporation is an American fabless semiconductor company that focuses largely on graphics processing units for the gaming industry and machine learning applications. They also design various other chips, SoC, and consumer electronics for the mobile and automotive markets.

GPU Families[edit]

CPU Families[edit]

GoForce
  • GoForce
Tegra

Microarchitectures[edit]

GPUs:

CPU:

ARM:
RISC-V:

NPU:

Comparison[edit]

Tegra
Generation Tegra 2 Tegra 3 Tegra 4 Tegra 4i Tegra K1 Tegra X1 Tegra X1+ Tegra X2 Xavier Orin Thor
CPU Instruction
set 		ARMv7‑A
(32‑bit) 		ARMv8‑A
(64‑bit) 		ARMv8.2‑A
(64‑bit) 		ARMv9.2‑A
(64‑bit)
Cores 2x ARM
Cortex-A9 		4+1x ARM
Cortex-A9 		4+1x ARM
Cortex-A15 		4+1x ARM
Cortex-A9 		4+1x ARM
Cortex-A15 		2x
Denver 		4x ARM Cortex-A53
(disabled) +
4x ARM Cortex-A57 		2x Denver2
+ 4x ARM
Cortex-A57 		8x
Carmel 		12x
Cortex
-A78AE 		Neoverse
V3AE
L1 cache (I/D) 32/32KB 128/64KB 32/32KB
+ 64/32KB 		128/64KB
+ 48/32KB 		128/64KB 64/64KB
L2 cache 1 MB 2 MB 128KB
+ 2MB 		2MB
+ 2MB 		8 MB 3 MB ?
L3 cache N/A 4 MB 6 MB ?
GPU Architecture Vec4 Kepler Maxwell Pascal Volta Ampere Blackwell
CUDA cores 4+4* 8+4* 48+24* 48+12* 192 256 512 2048 ?
Tensor cores N/A 64 ?
RT cores N/A 8 ?
RAM Protocol DDR2/
LPDDR2 		DDR3/
LPDDR2 		DDR3/
LPDDR3 		LPDDR3/
LPDDR4 		LPDDR4/
LPDDR4X 		LPDDR5 ?
Max. size 1 GB 2 GB 4 GB 8 GB 64 GB 128 GB
Bandwidth 2.7 GB/s 6.4 GB/s 7.5 GB/s 14.9 GB/s 25.6
GB/s 		34.1
GB/s 		59.7
GB/s 		136.5
GB/s 		204.8
GB/s 		?
Process 40 nm 28 nm 20 nm 16 nm 12 nm 8 nm 4 nm
  • VLIW-based Vec4: Pixel shaders + Vertex shaders. Since Kepler, Unified shaders are used.

Technology[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=nvidia&oldid=103044"
Facts about "Nvidia"
RDF feed
company typepublic +
founded1993 +
founderJen-Hsun Huang +, Chris Malachowsky + and Curtis Priem +
full page namenvidia +
headquartersSanta Clara, California +
instance ofsemiconductor company +
nameNVIDIA +
websitehttp://www.nvidia.com +
wikidata idQ182477 +