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Difference between revisions of "samsung/exynos/8895"
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(Added more technical information about the Exynos 8895.)
 
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{{chip
 
{{chip
 
|name=Exynos 8895
 
|name=Exynos 8895
−
|image=Exynos-9-Image-01.jpg
+
|no image=Yes
 
|designer=Samsung
 
|designer=Samsung
 
|designer 2=ARM Holdings
 
|designer 2=ARM Holdings
Line 9: Line 9:
 
|market=Mobile
 
|market=Mobile
 
|first announced=February 23, 2017
 
|first announced=February 23, 2017
−
|first launched=Mar 29, 2017
+
|first launched=March 29, 2017
 
|family=Exynos
 
|family=Exynos
−
|series=Exynos 8
+
|series=Exynos 9
−
|frequency=2,400 MHz
+
|locked=No
−
|frequency 2=1,700 MHz
+
|frequency=2314 MHz
 +
|frequency 2=1690 MHz
 +
|turbo frequency1=2002 MHz
 +
|turbo frequency2=2002 MHz
 +
|turbo frequency3=2002 MHz
 +
|turbo frequency4=2002 MHz
 +
|turbo frequency5=2808 MHz
 +
|turbo frequency6=2808 MHz
 +
|turbo frequency7=2808 MHz
 +
|turbo frequency8=2808 MHz
 +
|turbo frequency 2=2002 MHz
 +
|turbo frequency=2808 MHz
 +
|bus type=exynos-ossclk (Exynos SoC Base Clock)
 +
|bus speed=26MHz
 +
|bus links=3?
 +
|bus rate=8GT/s
 +
|clock multiplier=23x - 28x (turbo)
 +
|cpuid=universal8895
 
|isa=ARMv8
 
|isa=ARMv8
 
|isa family=ARM
 
|isa family=ARM
−
|microarch=Mongoose 2
+
|microarch=M2
 
|microarch 2=Cortex-A53
 
|microarch 2=Cortex-A53
 +
|platform=universal8895
 +
|chipset=Exynos 8895
 
|core name=Mongoose 2
 
|core name=Mongoose 2
 
|core name 2=Cortex-A53
 
|core name 2=Cortex-A53
 +
|core name 4=2nd generation
 +
|core family=Samsung Mongoose
 +
|core family 2=ARM Cortex
 +
|core model=Samsung Mongoose 2
 +
|core model 2=Cortex A53
 
|process=10 nm
 
|process=10 nm
 
|technology=CMOS
 
|technology=CMOS
 +
|mcp=No
 
|word size=64 bit
 
|word size=64 bit
 
|core count=8
 
|core count=8
 
|thread count=8
 
|thread count=8
 +
|max memory=8 GiB
 
|max cpus=1
 
|max cpus=1
 +
|v core min=0.7 V
 +
|v core max=1.3 V
 +
|v io=1.02 V
 +
|tdp=8 W
 +
|ctdp down=8 W
 +
|ctdp down frequency=2314 MHz
 +
|ctdp up=16 W
 +
|ctdp up frequency=2808 MHz
 +
|temp min=-15 °C
 +
|temp max=115 °C
 +
|tjunc min=110
 +
|tjunc max=115
 +
|predecessor=Exynos 8890
 +
|predecessor link=samsung/exynos/8890
 +
|successor=Exynos 9810
 +
|successor link=samsung/exynos/9810
 +
|contemporary=Exynos 9820
 +
|contemporary link=samsung/exynos/9820
 
}}
 
}}
 +
'''Exynos 8895''' is a {{arch|64}} [[octa-core]] [[ARM]] high performance mobile [[system on a chip]] designed by [[Samsung]] and introduced in mid-[[2017]]. The processor is fabricated on Samsung's [[10 nm process|10nm]] EUV (Extreme Ultra Violet) FinFET process and features [[8 cores]] in a dual-cluster configuration consisting of 4 {{samsung|Mongoose 2|l=arch}} [[big cores]] commonly running at 2314 (but can go up to 2808 MHz with Turbo unlocked), 4 {{armh|Cortex-A53|l=arch}} [[little cores]] at 1690 (Can go up to 2002 MHz with Turbo unlocked). This chip supports up to 8 GiB of dual-channel 16-bit LPDDR4X-1796 memory and incorporates a {{armh|Mali-G71}} MP20 GPU running at 546MHz (But can go up to 839MHz with turbo unlocked). The 8895 incorporates an LTE modem supporting cat 16 download and upload.
 +
 +
== Exynos Turbo ==
 +
As far as we know, Turbo frequencies are actually frequencies that the Exynos 8895 could originally go to, but it was limited most likely due to the heating that the Exynos were suffering at the time.
 +
 +
== Exynos ossclk ==
 +
The exynos-ossclk is responsible for generating the base frequency for components such as (cpu, gpu, ram, bus, dsp, madera, mif) and also for components outside the SoC like (usb, wifi, camera, pcie).
 +
 +
rate : 26MHz
 +
 +
== Exynos MIF ==
 +
MIF is basically the RAM controller its frequency must be parallel with the ram frequency.
 +
 +
rate : 1794MHz
 +
 +
== DSP Devfreq ==
 +
DSP is responsible for managing the connection speed between the display and the GPU.
 +
 +
If the DSP frequency is manually manipulated by the user, it will be possible to notice a difference in the fluidity of the display, the change in the maximum and minimum DSP frequencies will alter the data transfer rate sent to the display.
 +
 +
== Madera Devfreq ==
 +
 +
Madera is the audio controller chip for the Exynos 8895.
 +
 +
The User manipulation of the Madera frequency may increase or decrease the latency of the speaker audio.
 +
 +
== Cache ==
 +
{{main|samsung/microarchitectures/m2#Memory_Hierarchy|arm_holdings/microarchitectures/cortex-a53#Memory_Hierarchy|l1=Mongoose 2  § Cache||l2=Cortex-A53 § Cache}}
 +
For the {{samsung|Mongoose 2|l=arch}} core cluster:
 +
{{cache size
 +
|l1 cache=192 KiB
 +
|l1i cache=128 KiB
 +
|l1i break=2x64 KiB
 +
|l1i desc=4-way set associative
 +
|l1d cache=64 KiB
 +
|l1d break=2x32 KiB
 +
|l1d desc=8-way set associative
 +
|l2 cache=1 MiB
 +
|l2 break=2x512 KiB
 +
|l2 desc=16-way set associative
 +
|l3 cache=2 MiB
 +
|l3 break=2x1 MiB
 +
}}
 +
 +
For the {{armh|Cortex-A53|l=arch}} cluster:
 +
 +
{{cache size
 +
|l1 cache=256 KiB
 +
|l1i cache=128 KiB
 +
|l1i break=2x64 KiB
 +
|l1i desc=4-way set associative
 +
|l1d cache=128 KiB
 +
|l1d break=2x64 KiB
 +
|l1d desc=16-way set associative
 +
|l2 cache=512 KiB
 +
|l2 break=2x256 KiB
 +
|l2 desc=8-way set associative
 +
}}
 +
 +
== Memory controller ==
 +
{{memory controller
 +
|type=LPDDR4X-1796
 +
|ecc=No
 +
|max mem=8 GiB
 +
|controllers=2
 +
|channels=2
 +
|width=32 bit
 +
|max bandwidth=28.70 GB/s
 +
|frequency=1796 MHz
 +
|bandwidth schan=14.32 GB/s
 +
|bandwidth dchan=28.64 GB/s
 +
}}
 +
 +
== Graphics ==
 +
{{integrated graphics
 +
| gpu                = Mali-G71
 +
| device id          =
 +
| designer            = ARM Holdings
 +
| execution units    = 20
 +
| max displays        = 2
 +
| max memory          =
 +
| frequency          = 546 MHz
 +
| max frequency      = 839 MHz (turbo)
 +
 +
| output crt          =
 +
| output sdvo        =
 +
| output dsi          = Yes
 +
| output edp          =
 +
| output dp          =
 +
| output hdmi        = Yes (Dex)
 +
| output vga          =
 +
| output dvi          =
 +
 +
| directx ver        = 12
 +
| opengl ver        =
 +
| opengl es ver      = 3.2
 +
| openvg ver        = 1.1
 +
| opencl ver        = 2.0
 +
| vulkan ver        = 1.1
 +
| hdmi ver          =
 +
| dp ver            =
 +
| edp ver            =
 +
| max res hdmi      = 2850x1440
 +
| max res hdmi freq  = 60Hz
 +
| max res dp        =
 +
| max res dp freq    =
 +
| max res edp        =
 +
| max res edp freq  =
 +
| max res vga        =
 +
| max res vga freq  =
 +
}}
 +
 +
 +
{| class=wikitable
 +
|-
 +
! Codec !! Encode !! Decode150
 +
|-
 +
| [[HEVC]] (H.265) || {{tchk|yes}} || {{tchk|yes}}
 +
|-
 +
| [[MPEG-4 AVC]] (H.264) || {{tchk|yes}} || {{tchk|yes}}
 +
|-
 +
| [[VP9]] || {{tchk|yes}} || {{tchk|yes}}
 +
|-
 +
|}
 +
 +
All at 4K UHD 60fps.
 +
 +
== Wireless ==
 +
{{wireless links
 +
| 2g                =
 +
| csd              =
 +
| gsm              =
 +
| gprs              =
 +
| edge              =
 +
| cdmaone          =
 +
| is-95a            =
 +
| is-95b            =
 +
| 3g                =
 +
| cdma2000          =
 +
| cdma2000 1x      =
 +
| cdma2000 1xev-do  =
 +
| cdma2000 1x adv  =
 +
| umts              =
 +
| wcdma            = 
 +
| td-scdma          =
 +
| dc-hsdpa          =
 +
| hsdpa            =
 +
| hsupa            =
 +
| 4g                = Yes
 +
| 5g                = Yes
 +
| lte a            = Yes
 +
| e-utran          =
 +
| ue cat dl        = 16
 +
| ue cat dl rate    = 1000 Mbps
 +
| ue cat ul        = 16
 +
| ue cat ul rate    = 280 Mbps
 +
}}
 +
 +
== ISP ==
 +
* 28MP Rear
 +
* 16MP Front
 +
* 28MP+28MP Dual
 +
 +
== Features ==
 +
{{arm features
 +
|thumb=No
 +
|thumb2=No
 +
|thumbee=No
 +
|vfpv1=No
 +
|vfpv2=No
 +
|vfpv3=No
 +
|vfpv3-d16=No
 +
|vfpv3-f16=No
 +
|vfpv4=No
 +
|vfpv4-d16=No
 +
|vfpv5=No
 +
|neon=Yes
 +
|trustzone=Yes
 +
|jazelle=No
 +
|wmmx=No
 +
|wmmx2=No
 +
|pmuv3=No
 +
|crc32=Yes
 +
|crypto=Yes
 +
|fp=Yes
 +
|fp16=No
 +
|profile=No
 +
|ras=No
 +
|simd=No
 +
|rdm=No
 +
}}
 +
 +
== Utilizing devices ==
 +
* [[used by::Samsung Galaxy Note 8]]
 +
* [[used by::Samsung Galaxy S8]]
 +
* [[used by::Samsung Galaxy S8+]]

Latest revision as of 02:25, 17 March 2025

Edit Values
Exynos 8895
General Info
DesignerSamsung,
ARM Holdings
ManufacturerSamsung
Model Number8895
MarketMobile
IntroductionFebruary 23, 2017 (announced)
March 29, 2017 (launched)
General Specs
FamilyExynos
SeriesExynos 9
LockedNo
Frequency2314 MHz, 1690 MHz
Turbo Frequency2808 MHz
Turbo Frequency2002 MHz (1 core),
2002 MHz (2 cores),
2002 MHz (3 cores),
2002 MHz (4 cores),
2808 MHz (5 cores),
2808 MHz (6 cores),
2808 MHz (7 cores),
2808 MHz (8 cores)
Bus typeexynos-ossclk (Exynos SoC Base Clock)
Bus speed26MHz
Bus rate3? × 8GT/s
Clock multiplier23x - 28x (turbo)
CPUIDuniversal8895
Microarchitecture
ISAARMv8 (ARM)
MicroarchitectureM2, Cortex-A53
Platformuniversal8895
ChipsetExynos 8895
Core NameMongoose 2, Cortex-A53
Core FamilySamsung Mongoose, ARM Cortex
Core ModelSamsung Mongoose 2, Cortex A53
Process10 nm
TechnologyCMOS
MCPNo
Word Size64 bit
Cores8
Threads8
Max Memory8 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore0.7 V-1.3 V
VI/O1.02 V
TDP8 W
cTDP down8 W
cTDP down frequency2314 MHz
cTDP up16 W
cTDP up frequency2808 MHz
OP Temperature-15 °C – 115 °C
Tjunction110 – 115
Succession
Contemporary
Exynos 9820

Exynos 8895 is a 64-bit octa-core ARM high performance mobile system on a chip designed by Samsung and introduced in mid-2017. The processor is fabricated on Samsung's 10nm EUV (Extreme Ultra Violet) FinFET process and features 8 cores in a dual-cluster configuration consisting of 4 Mongoose 2 big cores commonly running at 2314 (but can go up to 2808 MHz with Turbo unlocked), 4 Cortex-A53 little cores at 1690 (Can go up to 2002 MHz with Turbo unlocked). This chip supports up to 8 GiB of dual-channel 16-bit LPDDR4X-1796 memory and incorporates a Mali-G71 MP20 GPU running at 546MHz (But can go up to 839MHz with turbo unlocked). The 8895 incorporates an LTE modem supporting cat 16 download and upload.

Exynos Turbo[edit]

As far as we know, Turbo frequencies are actually frequencies that the Exynos 8895 could originally go to, but it was limited most likely due to the heating that the Exynos were suffering at the time.

Exynos ossclk[edit]

The exynos-ossclk is responsible for generating the base frequency for components such as (cpu, gpu, ram, bus, dsp, madera, mif) and also for components outside the SoC like (usb, wifi, camera, pcie).

rate : 26MHz

Exynos MIF[edit]

MIF is basically the RAM controller its frequency must be parallel with the ram frequency.

rate : 1794MHz

DSP Devfreq[edit]

DSP is responsible for managing the connection speed between the display and the GPU.

If the DSP frequency is manually manipulated by the user, it will be possible to notice a difference in the fluidity of the display, the change in the maximum and minimum DSP frequencies will alter the data transfer rate sent to the display.

Madera Devfreq[edit]

Madera is the audio controller chip for the Exynos 8895.

The User manipulation of the Madera frequency may increase or decrease the latency of the speaker audio.

Cache[edit]

Main articles: Mongoose 2 § Cache and Cortex-A53 § Cache

For the Mongoose 2 core cluster:

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$192 KiB
196,608 B
0.188 MiB
L1I$128 KiB
131,072 B
0.125 MiB
2x64 KiB4-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  2x512 KiB16-way set associative 
L3$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  2x1 MiB  

For the Cortex-A53 cluster:

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
2x64 KiB4-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
2x64 KiB16-way set associative 
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB8-way set associative 

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR4X-1796
Supports ECCNo
Max Mem8 GiB
Frequency1796 MHz
Controllers2
Channels2
Width32 bit
Max Bandwidth28.70 GB/s
26.729 GiB/s
27,370.453 MiB/s
28,700 MB/s
0.0261 TiB/s
0.0287 TB/s
Bandwidth
Single 14.32 GB/s
Double 28.64 GB/s

Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUMali-G71
DesignerARM Holdings
Execution Units20Max Displays2
Frequency546 MHz
0.546 GHz
546,000 KHz
Burst Frequency839 MHz (turbo)
"MHz(turbo)" is not declared as a valid unit of measurement for this property.
OutputDSI
Max Resolution
HDMI2850x1440 @60Hz
Standards
DirectX12
OpenCL2.0
OpenGL ES3.2
OpenVG1.1
Vulkan1.1


Codec Encode Decode150
HEVC (H.265) ✔ ✔
MPEG-4 AVC (H.264) ✔ ✔
VP9 ✔ ✔

All at 4K UHD 60fps.

Wireless[edit]

Antu network-wireless-connected-100.svgWireless Communications
Cellular
4G
LTE Advanced
UE Cat DL16 (1000 Mbps)
UE Cat UL16 (280 Mbps)

ISP[edit]

  • 28MP Rear
  • 16MP Front
  • 28MP+28MP Dual

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported ARM Extensions & Processor Features
NEONAdvanced SIMD extension
TrustZoneTrustZone Security Extensions
CRC32CRC-32 checksum Extension
CryptoCryptographic Extension
FPFloating-point Extension

Utilizing devices[edit]

  • Samsung Galaxy Note 8
  • Samsung Galaxy S8
  • Samsung Galaxy S8+
Retrieved from "https://en.wikichip.org/w/index.php?title=samsung/exynos/8895&oldid=102992"
Facts about "Exynos 8895 - Samsung"
RDF feed
base frequency2,314 MHz (2.314 GHz, 2,314,000 kHz) + and 1,690 MHz (1.69 GHz, 1,690,000 kHz) +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus speed26 MHz (0.026 GHz, 26,000 kHz) +
bus typeexynos-ossclk (Exynos SoC Base Clock) +
chipsetExynos 8895 +
core count8 +
core familySamsung Mongoose + and ARM Cortex +
core modelSamsung Mongoose 2 + and Cortex A53 +
core nameMongoose 2 + and Cortex-A53 +
core voltage (max)1.3 V (13 dV, 130 cV, 1,300 mV) +
core voltage (min)0.7 V (7 dV, 70 cV, 700 mV) +
cpuiduniversal8895 +
designerSamsung + and ARM Holdings +
familyExynos +
first announcedFebruary 23, 2017 +
first launchedMarch 29, 2017 +
full page namesamsung/exynos/8895 +
has 4g supporttrue +
has ecc memory supportfalse +
has locked clock multiplierfalse +
has lte advanced supporttrue +
instance ofmicroprocessor +
integrated gpuMali-G71 +
integrated gpu base frequency546 MHz (0.546 GHz, 546,000 KHz) +
integrated gpu designerARM Holdings +
integrated gpu execution units20 +
io voltage1.02 V (10.2 dV, 102 cV, 1,020 mV) +
is multi-chip packagefalse +
isaARMv8 +
isa familyARM +
l1$ size192 KiB (196,608 B, 0.188 MiB) + and 256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative + and 16-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) + and 128 KiB (131,072 B, 0.125 MiB) +
l1i$ description4-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description16-way set associative + and 8-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + and 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldateMarch 29, 2017 +
manufacturerSamsung +
market segmentMobile +
max cpu count1 +
max junction temperature115 K (-158.15 °C, -252.67 °F, 207 °R) +
max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max memory bandwidth26.729 GiB/s (27,370.453 MiB/s, 28.7 GB/s, 28,700 MB/s, 0.0261 TiB/s, 0.0287 TB/s) +
max memory channels2 +
max operating temperature115 °C +
microarchitectureM2 + and Cortex-A53 +
min junction temperature110 K (-163.15 °C, -261.67 °F, 198 °R) +
min operating temperature-15 °C +
model number8895 +
nameExynos 8895 +
platformuniversal8895 +
process10 nm (0.01 μm, 1.0e-5 mm) +
seriesExynos 9 +
smp max ways1 +
supported memory typeLPDDR4X-1796 +
tdp8 W (8,000 mW, 0.0107 hp, 0.008 kW) +
tdp down8 W (8,000 mW, 0.0107 hp, 0.008 kW) +
tdp down frequency2,314 MHz (2.314 GHz, 2,314,000 kHz) +
tdp up16 W (16,000 mW, 0.0215 hp, 0.016 kW) +
tdp up frequency2,808 MHz (2.808 GHz, 2,808,000 kHz) +
technologyCMOS +
thread count8 +
turbo frequency2,808 MHz (2.808 GHz, 2,808,000 kHz) +
turbo frequency (1 core)2,002 MHz (2.002 GHz, 2,002,000 kHz) +
turbo frequency (2 cores)2,002 MHz (2.002 GHz, 2,002,000 kHz) +
turbo frequency (3 cores)2,002 MHz (2.002 GHz, 2,002,000 kHz) +
turbo frequency (4 cores)2,002 MHz (2.002 GHz, 2,002,000 kHz) +
turbo frequency (5 cores)2,808 MHz (2.808 GHz, 2,808,000 kHz) +
turbo frequency (6 cores)2,808 MHz (2.808 GHz, 2,808,000 kHz) +
turbo frequency (7 cores)2,808 MHz (2.808 GHz, 2,808,000 kHz) +
turbo frequency (8 cores)2,808 MHz (2.808 GHz, 2,808,000 kHz) +
used bySamsung Galaxy Note 8 +, Samsung Galaxy S8 + and Samsung Galaxy S8+ +
user equipment category downlink16 +
user equipment category uplink16 +
word size64 bit (8 octets, 16 nibbles) +