Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "annapurna labs/graviton/graviton3"
| Line 30: | Line 30: | ||
|contemporary link=annapurna_labs/graviton/graviton3e | |contemporary link=annapurna_labs/graviton/graviton3e | ||
}} | }} | ||
| + | '''AWS Graviton3''' is a [[tetrahexaconta-core]] [[ARMv8]] microprocessor designed by [[Amazon]] ([[Annapurna Labs]]) for Amazon's own infrastructure. Graviton3 is a [[5 nm]] 7-chiplet design SoC based on the Arm [[CMN-650 mesh interconnect]] and [[Neoverse V1]] core microarchitecture. This chip supports octa-channel DDR5-4800 ECC memory along with 32 lanes of PCIe 5.0. | ||
Revision as of 01:40, 12 December 2023
| Edit Values | |
| AWS Graviton3 | |
 | |
| Graviton3 Package Front | |
 | |
| General Info | |
| Designer | Annapurna Labs |
| Manufacturer | TSMC |
| Market | Server |
| Introduction | November 30, 2021 (announced) November 30, 2021 (launched) |
| General Specs | |
| Family | Graviton |
| Frequency | 2,600 MHz |
| Microarchitecture | |
| ISA | ARMv8.4-A (ARM) |
| Microarchitecture | Neoverse V1 |
| Process | 5 nm |
| Transistors | 55,000,000,000 |
| Technology | CMOS |
| MCP | Yes (7 dies) |
| Word Size | 64 bit |
| Cores | 64 |
| Threads | 64 |
| Succession | |
| Contemporary | |
| Graviton3E | |
AWS Graviton3 is a tetrahexaconta-core ARMv8 microprocessor designed by Amazon (Annapurna Labs) for Amazon's own infrastructure. Graviton3 is a 5 nm 7-chiplet design SoC based on the Arm CMN-650 mesh interconnect and Neoverse V1 core microarchitecture. This chip supports octa-channel DDR5-4800 ECC memory along with 32 lanes of PCIe 5.0.
Facts about "AWS Graviton3 - Annapurna Labs (Amazon)"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | AWS Graviton3 - Annapurna Labs (Amazon)#io + |
| base frequency | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
| core count | 64 + |
| designer | Annapurna Labs + |
| die count | 7 + |
| family | Graviton + |
| first announced | November 30, 2021 + |
| first launched | November 30, 2021 + |
| full page name | annapurna labs/graviton/graviton3 + |
| has ecc memory support | true + |
| instance of | microprocessor + |
| is multi-chip package | true + |
| isa | ARMv8.4-A + |
| isa family | ARM + |
| l1$ size | 8,192 KiB (8,388,608 B, 8 MiB) + |
| l1d$ size | 4,096 KiB (4,194,304 B, 4 MiB) + |
| l1i$ size | 4,096 KiB (4,194,304 B, 4 MiB) + |
| l2$ size | 64 MiB (65,536 KiB, 67,108,864 B, 0.0625 GiB) + |
| l3$ size | 32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) + |
| ldate | November 30, 2021 + |
| main image |  + |
| main image caption | Graviton3 Package Front + |
| manufacturer | TSMC + |
| market segment | Server + |
| max memory bandwidth | 286.102 GiB/s (292,968.75 MiB/s, 307.2 GB/s, 307,200 MB/s, 0.279 TiB/s, 0.307 TB/s) + |
| max memory channels | 8 + |
| max pcie lanes | 32 + |
| microarchitecture | Neoverse V1 + |
| name | AWS Graviton3 + |
| process | 5 nm (0.005 μm, 5.0e-6 mm) + |
| supported memory type | DDR5-4800 + |
| technology | CMOS + |
| thread count | 64 + |
| transistor count | 55,000,000,000 + |
| word size | 64 bit (8 octets, 16 nibbles) + |
