From WikiChip
Difference between revisions of "amd/ryzen 5/4500u"
< amd‎ | ryzen 5

(Source: https://www.amd.com/en/products/apu/amd-ryzen-5-4500u)
 
(→‎Memory controller: Removed junk.)
 
(13 intermediate revisions by 4 users not shown)
Line 2: Line 2:
 
{{chip
 
{{chip
 
|name=Ryzen 5 4500U
 
|name=Ryzen 5 4500U
−
|no image=Yes
+
|no image=No
 
|designer=AMD
 
|designer=AMD
 
|manufacturer=TSMC
 
|manufacturer=TSMC
Line 12: Line 12:
 
|family=Ryzen 5
 
|family=Ryzen 5
 
|series=4000
 
|series=4000
 +
|locked=Yes
 
|frequency=2,300 MHz
 
|frequency=2,300 MHz
 
|turbo frequency=4,000 MHz
 
|turbo frequency=4,000 MHz
−
|bus type=PCIe 3.0
 
 
|clock multiplier=23
 
|clock multiplier=23
 
|isa=x86-64
 
|isa=x86-64
Line 20: Line 20:
 
|microarch=Zen 2
 
|microarch=Zen 2
 
|core name=Renoir
 
|core name=Renoir
 +
|core family=23
 +
|core model=96
 +
|core stepping=A1
 
|process=7 nm
 
|process=7 nm
 +
|transistors=9,800,000,000
 
|technology=CMOS
 
|technology=CMOS
 +
|die area=156 mm²
 
|word size=64 bit
 
|word size=64 bit
 
|core count=6
 
|core count=6
 
|thread count=6
 
|thread count=6
 +
|max memory=64 GiB
 
|max cpus=1
 
|max cpus=1
 
|tdp=15 W
 
|tdp=15 W
 
|ctdp down=10 W
 
|ctdp down=10 W
 
|ctdp up=25 W
 
|ctdp up=25 W
−
|temp min=0° C
+
|tcase min=0 °C
−
|temp max=105 °C
+
|tcase max=105 °C
−
|package name 1=
+
|package name 1=amd,fp6
 
}}
 
}}
−
 
+
'''Ryzen 5 4500U''' is a {{arch|64}} [[hexa-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[AMD]] in early [[2020]]. Fabricated on [[N7|TSMC's 7-nanometer process]] and based on AMD's {{amd|Zen 2|Zen 2 microarchitecture|l=arch}}, the 4500U operates at a base frequency of 2.3 GHz with a [[TDP]] of 15 W and a {{amd|Precision Boost|boost}} frequency of up to 4.0 GHz. This APU supports up to 64 GiB of DDR4-3200 or up to 32 GiB of quad-channel LPDDR4x-4266 memory. This chip integrates {{amd|Radeon Vega 6}} graphics operating at up to 1.5 GHz.
−
'''Ryzen 5 4500U''' is a {{arch|64}} [[hexa-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[AMD]] in early [[2020]]. This processor is based on AMD's {{amd|Zen 2|Zen 2 microarchitecture|l=arch}} and is fabricated on a [[7 nm process]]. The 4500U operates at a base frequency of 2.3 GHz with a [[TDP]] of 15 W and a {{amd|Precision Boost|Boost}} frequency of 4.0 GHz. This APU supports DDR4-3200 and LPDDR4-4266 memory and incorporates {{amd|Radeon Vega}} Graphics operating at 1.5 GHz.
 
  
 
This model supports a configurable TDP-down of 10 W and TDP-up of 25 W.
 
This model supports a configurable TDP-down of 10 W and TDP-up of 25 W.
Line 55: Line 60:
 
|l3 cache=8 MiB
 
|l3 cache=8 MiB
 
|l3 break=2x4 MiB
 
|l3 break=2x4 MiB
 +
|l3 desc=16-way set associative
 +
|l3 policy=write-back
 
}}
 
}}
  
 
== Memory controller ==
 
== Memory controller ==
 +
This SoC features two memory controllers, each supporting DDR4 or LPDDR4x. This chip supports up to 64 GiB of dual-channel DDR4 memory with data rates of up to 3200 MT/s (51.2 GB/s) or up to 32 GiB of quad-channel LPDDR4x with data rates of up to 4266 MT/s (68.27 GB/s).
 +
 
{{memory controller
 
{{memory controller
 
|type=DDR4-3200
 
|type=DDR4-3200
−
|type 2=LPDDR4-4266
+
|type 2=LPDDR4x-4266
 +
|ecc=No
 +
|max mem=64 GiB
 +
|controllers=2
 +
|channels=4
 +
|max bandwidth=68.27 GB/s
 +
|bandwidth schan=17.07 GB/s
 +
|bandwidth dchan=34.13 GB/s
 +
|bandwidth qchan=68.27 GB/s
 +
}}
 +
 
 +
== Expansions ==
 +
This processor has 16 PCIe lanes, 1x8 designated for a discrete [[GPU]], 1x4 additional lanes for storage (e.g., NVMe), and 1x4 additional lanes reserved for additional peripherals  (e.g., WiFi or LTE).
 +
 
 +
{{expansions main
 +
|
 +
{{expansions entry
 +
|type=PCIe
 +
|pcie revision=3.0
 +
|pcie lanes=16
 +
|pcie config=1x8+1x4+1x4
 +
|pcie config 2=2x4+1x4+1x4
 +
}}
 
}}
 
}}
 +
  
 
== Graphics ==
 
== Graphics ==
 
{{integrated graphics
 
{{integrated graphics
−
| gpu                = Radeon Vega
+
| gpu                = Radeon Vega 6
 
| device id          =  
 
| device id          =  
 
| designer            = AMD
 
| designer            = AMD
 
| execution units    = 6
 
| execution units    = 6
−
| unified shaders    =
+
| unified shaders    = 384
−
| max displays        =
+
| max displays        = 4
−
| max memory          =
+
| max memory          =  
−
| frequency          = 1,500 MHz
+
| frequency          =  
−
| max frequency      =
+
| max frequency      = 1,500 MHz
  
 
| output crt          =  
 
| output crt          =  
Line 84: Line 116:
 
| output dvi          =  
 
| output dvi          =  
  
−
| directx ver        =
+
| directx ver        =  
−
| opengl ver        =
+
| opengl ver        =  
−
| opencl ver        =
+
| opencl ver        =  
 
| hdmi ver          =  
 
| hdmi ver          =  
 
| dp ver            =  
 
| dp ver            =  
Line 99: Line 131:
 
| max res vga freq  =  
 
| max res vga freq  =  
 
}}
 
}}
 +
{{zen 2 with vega hardware accelerated video table}}
  
 
== Features ==  
 
== Features ==  
Line 119: Line 152:
 
|sse42=Yes
 
|sse42=Yes
 
|sse4a=Yes
 
|sse4a=Yes
 +
|sse_gfni=No
 
|avx=Yes
 
|avx=Yes
 +
|avx_gfni=No
 
|avx2=Yes
 
|avx2=Yes
 
|avx512f=No
 
|avx512f=No
Line 131: Line 166:
 
|avx512vbmi=No
 
|avx512vbmi=No
 
|avx5124fmaps=No
 
|avx5124fmaps=No
 +
|avx512vnni=No
 
|avx5124vnniw=No
 
|avx5124vnniw=No
 
|avx512vpopcntdq=No
 
|avx512vpopcntdq=No
 +
|avx512gfni=No
 +
|avx512vaes=No
 +
|avx512vbmi2=No
 +
|avx512bitalg=No
 +
|avx512vpclmulqdq=No
 
|abm=Yes
 
|abm=Yes
 
|tbm=No
 
|tbm=No
Line 146: Line 187:
 
|clmul=Yes
 
|clmul=Yes
 
|f16c=Yes
 
|f16c=Yes
 +
|bfloat16=No
 
|tbt1=No
 
|tbt1=No
 
|tbt2=No
 
|tbt2=No
 
|tbmt3=No
 
|tbmt3=No
 +
|tvb=No
 
|bpt=No
 
|bpt=No
 
|eist=No
 
|eist=No
Line 179: Line 222:
 
|osguard=No
 
|osguard=No
 
|intqat=No
 
|intqat=No
 +
|dlboost=No
 
|3dnow=No
 
|3dnow=No
 
|e3dnow=No
 
|e3dnow=No
Line 192: Line 236:
 
|sensemi=Yes
 
|sensemi=Yes
 
|xfr=No
 
|xfr=No
 +
|xfr2=No
 
|mxfr=No
 
|mxfr=No
 
|amdpb=No
 
|amdpb=No
 
|amdpb2=No
 
|amdpb2=No
 +
|amdpbod=No
 
}}
 
}}
 +
 +
== Die ==
 +
{{amd renoir die}}

Latest revision as of 16:38, 10 May 2023

Edit Values
Ryzen 5 4500U
General Info
DesignerAMD
ManufacturerTSMC
Model Number4500U
Part Number100-000000084
MarketMobile
IntroductionJanuary 6, 2020 (announced)
January 6, 2020 (launched)
ShopAmazon
General Specs
FamilyRyzen 5
Series4000
LockedYes
Frequency2,300 MHz
Turbo Frequency4,000 MHz
Clock multiplier23
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen 2
Core NameRenoir
Core Family23
Core Model96
Core SteppingA1
Process7 nm
Transistors9,800,000,000
TechnologyCMOS
Die156 mm²
Word Size64 bit
Cores6
Threads6
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP15 W
cTDP down10 W
cTDP up25 W
Tcase0 °C – 105 °C
Packaging
PackageFP6 (FC-OBGA)
Dimension35 mm × 25 mm × 1.38 mm
Pitch0.65 mm
Contacts1140

Ryzen 5 4500U is a 64-bit hexa-core mid-range performance x86 mobile microprocessor introduced by AMD in early 2020. Fabricated on TSMC's 7-nanometer process and based on AMD's Zen 2 microarchitecture, the 4500U operates at a base frequency of 2.3 GHz with a TDP of 15 W and a boost frequency of up to 4.0 GHz. This APU supports up to 64 GiB of DDR4-3200 or up to 32 GiB of quad-channel LPDDR4x-4266 memory. This chip integrates Radeon Vega 6 graphics operating at up to 1.5 GHz.

This model supports a configurable TDP-down of 10 W and TDP-up of 25 W.

Cache[edit]

Main article: Zen 2 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$384 KiB
393,216 B
0.375 MiB
L1I$192 KiB
196,608 B
0.188 MiB
6x32 KiB8-way set associative 
L1D$192 KiB
196,608 B
0.188 MiB
6x32 KiB8-way set associativewrite-back
L2$3 MiB
3,072 KiB
3,145,728 B
0.00293 GiB
  6x512 KiB8-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  2x4 MiB16-way set associativewrite-back

Memory controller[edit]

This SoC features two memory controllers, each supporting DDR4 or LPDDR4x. This chip supports up to 64 GiB of dual-channel DDR4 memory with data rates of up to 3200 MT/s (51.2 GB/s) or up to 32 GiB of quad-channel LPDDR4x with data rates of up to 4266 MT/s (68.27 GB/s).

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-3200, LPDDR4x-4266
Supports ECCNo
Max Mem64 GiB
Controllers2
Channels4
Max Bandwidth68.27 GB/s
63.581 GiB/s
65,107.346 MiB/s
68,270 MB/s
0.0621 TiB/s
0.0683 TB/s
Bandwidth
Single 17.07 GB/s
Double 34.13 GB/s
Quad 68.27 GB/s

Expansions[edit]

This processor has 16 PCIe lanes, 1x8 designated for a discrete GPU, 1x4 additional lanes for storage (e.g., NVMe), and 1x4 additional lanes reserved for additional peripherals (e.g., WiFi or LTE).

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 16
Configuration: 1x8+1x4+1x4, 2x4+1x4+1x4


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPURadeon Vega 6
DesignerAMD
Execution Units6Max Displays4
Unified Shaders384
Burst Frequency1,500 MHz
1.5 GHz
1,500,000 KHz
OutputDP, HDMI
[Edit] Zen 2 with Radeon Vega Hardware Accelerated Video Capabilities
Codec Encode Decode
VP9 8bpc/10bpc 1080p240
4K 60 FPS
MPEG-2 (H.262) 8b 1080p240
4K 60 FPS 		1080p480
4K 120 FPS
HEVC (H.265) 8bpc/10bpc 1080p240
4K 60 FPS 		1080p240
4K 60 FPS

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
SSE4aStreaming SIMD Extensions 4a
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
SHASHA Extensions
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
AMD-ViAMD-Vi (I/O MMU virtualization)
AMD-VAMD Virtualization
SenseMISenseMI Technology

Die[edit]

Main article: Zen 2 § Die

Renoir microprocessors are fabricated on TSMC's 7-nanometer process. This SoC integrates 9.8 billion transistors on a single 156 mm² monolithic die which includes both the Zen 2 CPU cores along with the Vega GPU and various other additional components.


renoir die.png

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/ryzen_5/4500u&oldid=101716"
Facts about "Ryzen 5 4500U - AMD"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Ryzen 5 4500U - AMD#pcie +
base frequency2,300 MHz (2.3 GHz, 2,300,000 kHz) +
clock multiplier23 +
core count6 +
core family23 +
core model96 +
core nameRenoir +
core steppingA1 +
designerAMD +
die area156 mm² (0.242 in², 1.56 cm², 156,000,000 µm²) +
familyRyzen 5 +
first announcedJanuary 6, 2020 +
first launchedJanuary 6, 2020 +
full page nameamd/ryzen 5/4500u +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has amd amd-v technologytrue +
has amd amd-vi technologytrue +
has amd sensemi technologytrue +
has ecc memory supportfalse +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology +
has locked clock multipliertrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuRadeon Vega 6 +
integrated gpu designerAMD +
integrated gpu execution units6 +
integrated gpu max frequency1,500 MHz (1.5 GHz, 1,500,000 KHz) +
isax86-64 +
isa familyx86 +
l1$ size384 KiB (393,216 B, 0.375 MiB) +
l1d$ description8-way set associative +
l1d$ size192 KiB (196,608 B, 0.188 MiB) +
l1i$ description8-way set associative +
l1i$ size192 KiB (196,608 B, 0.188 MiB) +
l2$ description8-way set associative +
l2$ size3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +
l3$ description16-way set associative +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldateJanuary 6, 2020 +
manufacturerTSMC +
market segmentMobile +
max case temperature378.15 K (105 °C, 221 °F, 680.67 °R) +
max cpu count1 +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth63.581 GiB/s (65,107.346 MiB/s, 68.27 GB/s, 68,270 MB/s, 0.0621 TiB/s, 0.0683 TB/s) +
max memory channels4 +
microarchitectureZen 2 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number4500U +
nameRyzen 5 4500U +
packageFP6 +
part number100-000000084 +
process7 nm (0.007 μm, 7.0e-6 mm) +
series4000 +
smp max ways1 +
supported memory typeDDR4-3200 + and LPDDR4x-4266 +
tdp15 W (15,000 mW, 0.0201 hp, 0.015 kW) +
tdp down10 W (10,000 mW, 0.0134 hp, 0.01 kW) +
tdp up25 W (25,000 mW, 0.0335 hp, 0.025 kW) +
technologyCMOS +
thread count6 +
transistor count9,800,000,000 +
turbo frequency4,000 MHz (4 GHz, 4,000,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +