From WikiChip
Difference between revisions of "amd/ryzen 3/2200u"
GreenReaper (talk | contribs) (Actually this has a base of 2.5Ghz and 3 CUs per the presentation slide.) |
(Replaced package module by package name.) |
||
(10 intermediate revisions by 3 users not shown) | |||
Line 7: | Line 7: | ||
|model number=2200U | |model number=2200U | ||
|market=Mobile | |market=Mobile | ||
− | |first announced=January 8, | + | |first announced=January 8, 2018 |
− | |first launched=January 8, | + | |first launched=January 8, 2018 |
|family=Ryzen 3 | |family=Ryzen 3 | ||
|series=2000U | |series=2000U | ||
Line 18: | Line 18: | ||
|isa family=x86 | |isa family=x86 | ||
|microarch=Zen | |microarch=Zen | ||
+ | |chipset=Promontory | ||
|core name=Raven Ridge | |core name=Raven Ridge | ||
+ | |core family=23 | ||
+ | |core model=1 | ||
|process=14 nm | |process=14 nm | ||
|transistors=4,950,000,000 | |transistors=4,950,000,000 | ||
Line 27: | Line 30: | ||
|thread count=4 | |thread count=4 | ||
|max cpus=1 | |max cpus=1 | ||
+ | |max memory=32 GiB | ||
|tdp=15 W | |tdp=15 W | ||
|ctdp down=12 W | |ctdp down=12 W | ||
|ctdp up=25 W | |ctdp up=25 W | ||
− | |package | + | |package name 1=amd,fp5 |
}} | }} | ||
− | '''Ryzen 3 2200U''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[AMD]] in | + | '''Ryzen 3 2200U''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[AMD]] in early [[2018]]. This processor is based on AMD's {{amd|Zen|Zen microarchitecture|l=arch}} and is fabricated on a [[14 nm process]]. The 2200U operates at a base frequency of 2.5 GHz with a [[TDP]] of 15 W and a {{amd|Precision Boost|Boost}} frequency of 3.4 GHz. This MPU supports up to 32 GiB of dual-channel DDR4-2400 memory and incorporates {{amd|Radeon Vega 3}} Graphics operating at up to 1 GHz. |
This model supports a configurable TDP-down of 12 W and TDP-up of 25 W. | This model supports a configurable TDP-down of 12 W and TDP-up of 25 W. | ||
Line 39: | Line 43: | ||
{{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}} | {{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}} | ||
{{cache size | {{cache size | ||
− | |l1 cache= | + | |l1 cache=192 KiB |
− | |l1i cache= | + | |l1i cache=128 KiB |
− | |l1i break= | + | |l1i break=2x64 KiB |
|l1i desc=4-way set associative | |l1i desc=4-way set associative | ||
− | |l1d cache= | + | |l1d cache=64 KiB |
− | |l1d break= | + | |l1d break=2x32 KiB |
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
|l1d policy=write-back | |l1d policy=write-back | ||
− | |l2 cache= | + | |l2 cache=1 MiB |
− | |l2 break= | + | |l2 break=2x512 KiB |
|l2 desc=8-way set associative | |l2 desc=8-way set associative | ||
|l2 policy=write-back | |l2 policy=write-back | ||
Line 58: | Line 62: | ||
{{memory controller | {{memory controller | ||
|type=DDR4-2400 | |type=DDR4-2400 | ||
− | |max mem= | + | |ecc=Yes |
+ | |max mem=32 GiB | ||
|controllers=2 | |controllers=2 | ||
|channels=2 | |channels=2 | ||
Line 67: | Line 72: | ||
== Expansions == | == Expansions == | ||
+ | This processor has 12 PCIe lanes, 1x8 typically designated for a [[GPU]] and 4 additional lanes for storage (e.g., NVMe). | ||
{{expansions main | {{expansions main | ||
| | | | ||
Line 72: | Line 78: | ||
|type=PCIe | |type=PCIe | ||
|pcie revision=3.0 | |pcie revision=3.0 | ||
− | |pcie lanes= | + | |pcie lanes=12 |
− | |pcie config= | + | |pcie config=1x8+1x4 |
+ | |pcie config 2=2x4+1x4 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=PCIe | ||
+ | |pcie revision=3.0 | ||
+ | |pcie lanes=12 | ||
+ | |pcie config=1x8+1x4 | ||
+ | |pcie config 2=2x4+1x4 | ||
}} | }} | ||
}} | }} | ||
Line 87: | Line 101: | ||
| max memory = | | max memory = | ||
| frequency = | | frequency = | ||
− | | max frequency = | + | | max frequency = 1,000 MHz |
| output crt = | | output crt = |
Latest revision as of 13:06, 18 March 2023
Edit Values | |
Ryzen 3 2200U | |
General Info | |
Designer | AMD |
Manufacturer | GlobalFoundries |
Model Number | 2200U |
Market | Mobile |
Introduction | January 8, 2018 (announced) January 8, 2018 (launched) |
Shop | Amazon |
General Specs | |
Family | Ryzen 3 |
Series | 2000U |
Locked | Yes |
Frequency | 2,500 MHz |
Turbo Frequency | 3,400 MHz (1 core) |
Clock multiplier | 25 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen |
Chipset | Promontory |
Core Name | Raven Ridge |
Core Family | 23 |
Core Model | 1 |
Process | 14 nm |
Transistors | 4,950,000,000 |
Technology | CMOS |
Die | 209.78 mm² |
Word Size | 64 bit |
Cores | 2 |
Threads | 4 |
Max Memory | 32 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 15 W |
cTDP down | 12 W |
cTDP up | 25 W |
Packaging | |
Package | FP5 |
Package Type | Organic Micro Ball Grid Array |
Dimension | 35 mm × 25 mm |
Pitch | 0.7 mm |
Contacts | 1140 |
Ryzen 3 2200U is a 64-bit dual-core mid-range performance x86 mobile microprocessor introduced by AMD in early 2018. This processor is based on AMD's Zen microarchitecture and is fabricated on a 14 nm process. The 2200U operates at a base frequency of 2.5 GHz with a TDP of 15 W and a Boost frequency of 3.4 GHz. This MPU supports up to 32 GiB of dual-channel DDR4-2400 memory and incorporates Radeon Vega 3 Graphics operating at up to 1 GHz.
This model supports a configurable TDP-down of 12 W and TDP-up of 25 W.
Cache[edit]
- Main article: Zen § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
|||||||||||||||||||||||||||||||||||||
|
Memory controller[edit]
Integrated Memory Controller
|
||||||||||||||
|
Expansions[edit]
This processor has 12 PCIe lanes, 1x8 typically designated for a GPU and 4 additional lanes for storage (e.g., NVMe).
Expansion Options |
|||||||||
|
Graphics[edit]
Integrated Graphics Information
|
||||||||||||||||||||||||||||||
|
[Edit] Zen with Radeon Vega Hardware Accelerated Video Capabilities | |||||
---|---|---|---|---|---|
Codec | Encode | Decode | |||
Max FPS | @1080p | @1440p | @2160p | @1080p 4:2:0 | @2160p 4:2:0 |
MPEG-2 (H.262) | 60 FPS | N/A | |||
VC-1 | |||||
VP9 8bpc | 240 FPS | 60 FPS | |||
VP9 10bpc | |||||
MPEG-4 AVC (H.264) 8bpc | 120 FPS | 60 FPS | 30 FPS | ||
MPEG-4 AVC (H.264) 10bpc | |||||
HEVC (H.265) 8bpc | 120 FPS | 60 FPS | 30 FPS | ||
HEVC (H.265) 10bpc | |||||
JPEG/MJPEG 8bpc |
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
Die Shot[edit]
- Further information: Zen § Die Shot
- 14 nm process
- 4,950,000,000 transistors
- 209.78 mm² die size
Facts about "Ryzen 3 2200U - AMD"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Ryzen 3 2200U - AMD#pcie + |
base frequency | 2,500 MHz (2.5 GHz, 2,500,000 kHz) + |
chipset | Promontory + |
clock multiplier | 25 + |
core count | 2 + |
core family | 23 + |
core model | 1 + |
core name | Raven Ridge + |
designer | AMD + |
die area | 209.78 mm² (0.325 in², 2.098 cm², 209,780,000 µm²) + |
family | Ryzen 3 + |
first announced | January 8, 2018 + |
first launched | January 8, 2018 + |
full page name | amd/ryzen 3/2200u + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has amd amd-v technology | true + |
has amd amd-vi technology | true + |
has amd mobile extended frequency range | true + |
has amd precision boost 2 | true + |
has amd sensemi technology | true + |
has ecc memory support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, SenseMI Technology +, Mobile Extended Frequency Range + and Precision Boost 2 + |
has locked clock multiplier | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | Radeon Vega 3 + |
integrated gpu designer | AMD + |
integrated gpu execution units | 3 + |
integrated gpu max frequency | 1,000 MHz (1 GHz, 1,000,000 KHz) + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
ldate | January 8, 2018 + |
manufacturer | GlobalFoundries + |
market segment | Mobile + |
max cpu count | 1 + |
max memory | 32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) + |
max memory bandwidth | 35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) + |
max memory channels | 2 + |
microarchitecture | Zen + |
model number | 2200U + |
name | Ryzen 3 2200U + |
package | FP5 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
series | 2000U + |
smp max ways | 1 + |
supported memory type | DDR4-2400 + |
tdp | 15 W (15,000 mW, 0.0201 hp, 0.015 kW) + |
tdp down | 12 W (12,000 mW, 0.0161 hp, 0.012 kW) + |
tdp up | 25 W (25,000 mW, 0.0335 hp, 0.025 kW) + |
technology | CMOS + |
thread count | 4 + |
transistor count | 4,950,000,000 + |
turbo frequency (1 core) | 3,400 MHz (3.4 GHz, 3,400,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |