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Information for "samsung/microarchitectures/m5"
Basic information
| Display title | Exynos M5 - Microarchitectures - Samsung |
| Default sort key | Exynos M5, Samsung |
| Page length (in bytes) | 2,578 |
| Page ID | 32635 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 2 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | David (talk | contribs) |
| Date of page creation | 00:07, 14 January 2019 |
| Latest editor | David (talk | contribs) |
| Date of latest edit | 21:10, 27 July 2021 |
| Total number of edits | 13 |
| Total number of distinct authors | 6 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (9) | Templates used on this page: |
Facts about "Exynos M5 - Microarchitectures - Samsung"
| codename | Lion M5 + |
| core count | 2 + |
| designer | Samsung + |
| first launched | 2020 + |
| full page name | samsung/microarchitectures/m5 + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv8.2 + |
| manufacturer | Samsung + |
| microarchitecture type | CPU + |
| name | Lion M5 + |
| pipeline stages | 16 + |
| process | 7 nm (0.007 μm, 7.0e-6 mm) + |