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Information for "hisilicon/k3/k3v1"
Basic information
Display title | K3V1 - HiSilicon |
Default sort key | K3V1, HiSilicon |
Page length (in bytes) | 2,557 |
Page ID | 25433 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 5 |
Counted as a content page | Yes |
Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | Inject (talk | contribs) |
Date of page creation | 22:47, 5 September 2017 |
Latest editor | At32Hz (talk | contribs) |
Date of latest edit | 20:30, 3 June 2018 |
Total number of edits | 14 |
Total number of distinct authors | 4 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Page properties
Transcluded templates (18) | Templates used on this page:
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Facts about "K3V1 - HiSilicon"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | K3V1 - HiSilicon#package + |
base frequency | 460 MHz (0.46 GHz, 460,000 kHz) + |
core count | 1 + |
core name | ARM926EJ-S + |
designer | HiSilicon + and ARM Holdings + |
family | K3 + |
first announced | June 2008 + |
first launched | June 2008 + |
full page name | hisilicon/k3/k3v1 + |
has ecc memory support | false + |
instance of | microprocessor + |
io voltage | 1.8 V (18 dV, 180 cV, 1,800 mV) + and 2.5 V (25 dV, 250 cV, 2,500 mV) + |
isa | ARMv5 + |
isa family | ARM + |
l1$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l1d$ description | 4-way set associative + |
l1d$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
ldate | June 2008 + |
manufacturer | TSMC + |
market segment | Mobile + |
max cpu count | 1 + |
max memory channels | 1 + |
microarchitecture | ARM9 + |
model number | K3V1 + |
name | K3V1 + |
package | TFBGA-460 + |
part number | Hi3611 + |
process | 180 nm (0.18 μm, 1.8e-4 mm) + |
smp max ways | 1 + |
supported memory type | DDR + |
technology | CMOS + |
thread count | 1 + |
transistor count | 200,000,000 + |
word size | 32 bit (4 octets, 8 nibbles) + |